6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-16 11:30:51 +00:00
Code Issues Projects Releases Wiki Activity

Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator.

Browse Source 
Remvoe some dead code


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5070 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2002-12-16 14:37:00 +00:00
parent 68b1edca76
commit 1d62cea90b
1 changed files with 2 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/CodeGen/RegAllocSimple.cpp
View File

@ -1,4 +1,4 @@
//===-- RegAllocSimple.cpp - A simple generic register allocator --- ------===//
//===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
//
// This file implements a simple register allocator. *Very* simple.
//
@ -12,32 +12,6 @@
#include <iostream>
#include <set>
#if 0
/// PhysRegClassMap - Construct a mapping of physical register numbers to their
/// register classes.
///
/// NOTE: This class will eventually be pulled out to somewhere shared.
///
class PhysRegClassMap {
std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
public:
PhysRegClassMap(const MRegisterInfo *RI) {
for (MRegisterInfo::const_iterator I = RI->regclass_begin(),
E = RI->regclass_end(); I != E; ++I)
for (unsigned i=0; i < (*I)->getNumRegs(); ++i)
PhysReg2RegClassMap[(*I)->getRegister(i)] = *I;
}
const TargetRegisterClass *operator[](unsigned Reg) {
assert(PhysReg2RegClassMap[Reg] && "Register is not a known physreg!");
return PhysReg2RegClassMap[Reg];
}
const TargetRegisterClass *get(unsigned Reg) { return operator[](Reg); }
};
#endif
namespace {
Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
Statistic<> NumReloaded("ra-simple", "Number of registers reloaded");
@ -367,6 +341,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
return true;
}
Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
Pass *createSimpleRegisterAllocator(TargetMachine &TM) {
return new RegAllocSimple(TM);
}