6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-17 20:29:31 +00:00
Code Issues Projects Releases Wiki Activity

I think that V8 should coallesce registers, don't you?

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15192 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-07-25 06:19:04 +00:00
parent 89756ea109
commit 1d6dc97463
4 changed files with 50 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
lib/Target/Sparc/SparcInstrInfo.cpp
View File

@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "SparcV8InstrInfo.h"
#include "SparcV8.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "SparcV8GenInstrInfo.inc"
using namespace llvm;
@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
: TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
}
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
///
bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const {
if (MI.getOpcode() == V8::ORrr) {
if (MI.getOperand(1).getReg() == V8::G0) { // X = or G0, Y -> X = Y
DstReg = MI.getOperand(0).getReg();
SrcReg = MI.getOperand(2).getReg();
}
return true;
} else if (MI.getOpcode() == V8::FMOVS) {
SrcReg = MI.getOperand(1).getReg();
DstReg = MI.getOperand(0).getReg();
return true;
}
return false;
}

6
lib/Target/Sparc/SparcInstrInfo.h
View File

@ -41,6 +41,12 @@ public:
/// always be able to get register info as well (through this method).
///
virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
///
virtual bool isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const;
};
}

19
lib/Target/SparcV8/SparcV8InstrInfo.cpp
View File

@ -12,6 +12,7 @@
//===----------------------------------------------------------------------===//
#include "SparcV8InstrInfo.h"
#include "SparcV8.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "SparcV8GenInstrInfo.inc"
using namespace llvm;
@ -20,3 +21,21 @@ SparcV8InstrInfo::SparcV8InstrInfo()
: TargetInstrInfo(SparcV8Insts, sizeof(SparcV8Insts)/sizeof(SparcV8Insts[0])){
}
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
///
bool SparcV8InstrInfo::isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const {
if (MI.getOpcode() == V8::ORrr) {
if (MI.getOperand(1).getReg() == V8::G0) { // X = or G0, Y -> X = Y
DstReg = MI.getOperand(0).getReg();
SrcReg = MI.getOperand(2).getReg();
}
return true;
} else if (MI.getOpcode() == V8::FMOVS) {
SrcReg = MI.getOperand(1).getReg();
DstReg = MI.getOperand(0).getReg();
return true;
}
return false;
}

6
lib/Target/SparcV8/SparcV8InstrInfo.h
View File

@ -41,6 +41,12 @@ public:
/// always be able to get register info as well (through this method).
///
virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
///
virtual bool isMoveInstr(const MachineInstr &MI,
unsigned &SrcReg, unsigned &DstReg) const;
};
}