Initial Mips64 support. Patch by Liu with some modifications.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140178 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2011-09-20 20:28:08 +00:00
parent 9914f4a1f2
commit 1daa5bea58
2 changed files with 20 additions and 2 deletions

View File

@ -38,6 +38,10 @@ def FeatureSingleFloat : SubtargetFeature<"single-float", "IsSingleFloat",
"true", "Only supports single precision float">;
def FeatureO32 : SubtargetFeature<"o32", "MipsABI", "O32",
"Enable o32 ABI">;
def FeatureN32 : SubtargetFeature<"n32", "MipsABI", "N32",
"Enable n32 ABI">;
def FeatureN64 : SubtargetFeature<"n64", "MipsABI", "N64",
"Enable n64 ABI">;
def FeatureEABI : SubtargetFeature<"eabi", "MipsABI", "EABI",
"Enable eabi ABI">;
def FeatureVFPU : SubtargetFeature<"vfpu", "HasVFPU",
@ -60,6 +64,13 @@ def FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32",
def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion",
"Mips32r2", "Mips32r2 ISA Support",
[FeatureMips32, FeatureSEInReg]>;
def FeatureMips64 : SubtargetFeature<"mips64", "MipsArchVersion",
"Mips64", "Mips64 ISA Support",
[FeatureGP64Bit, FeatureFP64Bit,
FeatureMips32]>;
def FeatureMips64r2 : SubtargetFeature<"mips64r2", "MipsArchVersion",
"Mips64r2", "Mips64r2 ISA Support",
[FeatureMips64, FeatureMips32r2]>;
//===----------------------------------------------------------------------===//
// Mips processors supported.
@ -70,6 +81,8 @@ class Proc<string Name, list<SubtargetFeature> Features>
def : Proc<"mips32r1", [FeatureMips32]>;
def : Proc<"4ke", [FeatureMips32r2]>;
def : Proc<"mips64r1", [FeatureMips64]>;
def : Proc<"mips64r2", [FeatureMips64r2]>;
def MipsAsmWriter : AsmWriter {
string AsmWriterClassName = "InstPrinter";

View File

@ -35,7 +35,7 @@ public:
protected:
enum MipsArchEnum {
Mips32, Mips32r2
Mips32, Mips32r2, Mips64, Mips64r2
};
// Mips architecture version
@ -91,6 +91,8 @@ public:
/// Only O32 and EABI supported right now.
bool isABI_EABI() const { return MipsABI == EABI; }
bool isABI_N64() const { return MipsABI == N64; }
bool isABI_N32() const { return MipsABI == N32; }
bool isABI_O32() const { return MipsABI == O32; }
unsigned getTargetABI() const { return MipsABI; }
@ -104,7 +106,10 @@ public:
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool isMips32() const { return MipsArchVersion >= Mips32; }
bool isMips32r2() const { return MipsArchVersion == Mips32r2; }
bool isMips32r2() const { return MipsArchVersion == Mips32r2 ||
MipsArchVersion == Mips64r2; }
bool isMips64() const { return MipsArchVersion >= Mips64; }
bool isMips64r2() const { return MipsArchVersion == Mips64r2; }
bool isLittle() const { return IsLittle; }
bool isFP64bit() const { return IsFP64bit; }