mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-17 05:29:24 +00:00
Output to cerr rather than cout so that debug info doesn't mess up assembly generation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@840 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
18fc812a1b
commit
1e23ed7c65
@ -7,7 +7,7 @@ InterferenceGraph::InterferenceGraph(RegClass *const RC) : RegCl(RC),
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IG = NULL;
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Size = 0;
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if( DEBUG_RA) {
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cout << "Interference graph created!" << endl;
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cerr << "Interference graph created!" << endl;
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}
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}
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@ -65,7 +65,7 @@ void InterferenceGraph::setInterference(const LiveRange *const LR1,
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char *val;
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if( DEBUG_RA > 1)
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cout << "setting intf for: [" << row << "][" << col << "]" << endl;
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cerr << "setting intf for: [" << row << "][" << col << "]" << endl;
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( row > col) ? val = &IG[row][col]: val = &IG[col][row];
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@ -118,9 +118,9 @@ void InterferenceGraph::mergeIGNodesOfLRs(const LiveRange *const LR1,
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assertIGNode( SrcNode );
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if( DEBUG_RA > 1) {
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cout << "Merging LRs: \""; LR1->printSet();
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cout << "\" and \""; LR2->printSet();
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cout << "\"" << endl;
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cerr << "Merging LRs: \""; LR1->printSet();
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cerr << "\" and \""; LR2->printSet();
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cerr << "\"" << endl;
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}
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unsigned SrcDegree = SrcNode->getNumOfNeighbors();
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@ -147,10 +147,10 @@ void InterferenceGraph::mergeIGNodesOfLRs(const LiveRange *const LR1,
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setInterference(LR1, LROfNeigh );
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}
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//cout<< " #Neighs - Neigh: ["<< NeighNode->getIndex()<< "] ";
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//cout << NeighNode->getNumOfNeighbors();
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//cout << " Dest: [" << DestNode->getIndex() << "] ";
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//cout << DestNode->getNumOfNeighbors() << endl;
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//cerr<< " #Neighs - Neigh: ["<< NeighNode->getIndex()<< "] ";
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//cerr << NeighNode->getNumOfNeighbors();
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//cerr << " Dest: [" << DestNode->getIndex() << "] ";
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//cerr << DestNode->getNumOfNeighbors() << endl;
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}
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@ -193,13 +193,13 @@ void InterferenceGraph::printIG() const
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if( ! Node )
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continue; // skip empty rows
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cout << " [" << i << "] ";
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cerr << " [" << i << "] ";
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for( unsigned int j=0; j < Size; j++) {
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if( j >= i) break;
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if( IG[i][j] ) cout << "(" << i << "," << j << ") ";
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if( IG[i][j] ) cerr << "(" << i << "," << j << ") ";
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}
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cout << endl;
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cerr << endl;
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}
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}
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@ -215,10 +215,10 @@ void InterferenceGraph::printIGNodeList() const
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if( ! Node )
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continue;
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cout << " [" << Node->getIndex() << "] ";
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cerr << " [" << Node->getIndex() << "] ";
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(Node->getParentLR())->printSet();
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//int Deg = Node->getCurDegree();
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cout << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">" << endl;
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cerr << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">" << endl;
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}
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}
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@ -46,7 +46,7 @@ void LiveRangeInfo::constructLiveRanges()
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{
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if( DEBUG_RA)
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cout << "Consturcting Live Ranges ..." << endl;
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cerr << "Consturcting Live Ranges ..." << endl;
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// first find the live ranges for all incoming args of the method since
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// those LRs start from the start of the method
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@ -75,8 +75,8 @@ void LiveRangeInfo::constructLiveRanges()
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if( DEBUG_RA > 1) {
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cout << " adding LiveRange for argument ";
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printValue( (const Value *) *ArgIt); cout << endl;
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cerr << " adding LiveRange for argument ";
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printValue( (const Value *) *ArgIt); cerr << endl;
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}
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}
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@ -124,9 +124,9 @@ void LiveRangeInfo::constructLiveRanges()
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OpI.getMachineOperand().getOperandType();
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if ( OpTyp == MachineOperand::MO_CCRegister) {
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cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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cerr << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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cout << endl;
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cerr << endl;
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}
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}
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@ -139,8 +139,8 @@ void LiveRangeInfo::constructLiveRanges()
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// Only instruction values are accepted for live ranges here
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if( Def->getValueType() != Value::InstructionVal ) {
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cout << "\n**%%Error: Def is not an instruction val. Def=";
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printValue( Def ); cout << endl;
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cerr << "\n**%%Error: Def is not an instruction val. Def=";
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printValue( Def ); cerr << endl;
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continue;
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}
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@ -156,8 +156,8 @@ void LiveRangeInfo::constructLiveRanges()
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LiveRangeMap[ Def ] = DefRange; // update the map
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if( DEBUG_RA > 1) {
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cout << " creating a LR for def: ";
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printValue(Def); cout << endl;
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cerr << " creating a LR for def: ";
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printValue(Def); cerr << endl;
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}
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// set the register class of the new live range
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@ -171,7 +171,7 @@ void LiveRangeInfo::constructLiveRanges()
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if(isCC && DEBUG_RA) {
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cout << "\a**created a LR for a CC reg:";
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cerr << "\a**created a LR for a CC reg:";
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printValue( OpI.getMachineOperand().getVRegValue() );
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}
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@ -185,8 +185,8 @@ void LiveRangeInfo::constructLiveRanges()
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LiveRangeMap[ Def ] = DefRange;
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if( DEBUG_RA > 1) {
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cout << " added to an existing LR for def: ";
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printValue( Def ); cout << endl;
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cerr << " added to an existing LR for def: ";
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printValue( Def ); cerr << endl;
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}
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}
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@ -206,7 +206,7 @@ void LiveRangeInfo::constructLiveRanges()
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suggestRegs4CallRets();
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if( DEBUG_RA)
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cout << "Initial Live Ranges constructed!" << endl;
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cerr << "Initial Live Ranges constructed!" << endl;
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}
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@ -257,7 +257,7 @@ void LiveRangeInfo::coalesceLRs()
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*/
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if( DEBUG_RA)
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cout << endl << "Coalscing LRs ..." << endl;
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cerr << endl << "Coalscing LRs ..." << endl;
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Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
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@ -274,9 +274,9 @@ void LiveRangeInfo::coalesceLRs()
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const MachineInstr * MInst = *MInstIterator;
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if( DEBUG_RA > 1) {
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cout << " *Iterating over machine instr ";
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cerr << " *Iterating over machine instr ";
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MInst->dump();
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cout << endl;
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cerr << endl;
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}
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@ -298,8 +298,8 @@ void LiveRangeInfo::coalesceLRs()
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//don't warn about labels
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if (!((*UseI)->getType())->isLabelType() && DEBUG_RA) {
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cout<<" !! Warning: No LR for use "; printValue(*UseI);
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cout << endl;
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cerr<<" !! Warning: No LR for use "; printValue(*UseI);
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cerr << endl;
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}
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continue; // ignore and continue
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}
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@ -345,7 +345,7 @@ void LiveRangeInfo::coalesceLRs()
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} // for all BBs
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if( DEBUG_RA)
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cout << endl << "Coalscing Done!" << endl;
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cerr << endl << "Coalscing Done!" << endl;
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}
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@ -359,11 +359,11 @@ void LiveRangeInfo::coalesceLRs()
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void LiveRangeInfo::printLiveRanges()
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{
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LiveRangeMapType::iterator HMI = LiveRangeMap.begin(); // hash map iterator
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cout << endl << "Printing Live Ranges from Hash Map:" << endl;
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cerr << endl << "Printing Live Ranges from Hash Map:" << endl;
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for( ; HMI != LiveRangeMap.end() ; HMI ++ ) {
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if( (*HMI).first && (*HMI).second ) {
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cout <<" "; printValue((*HMI).first); cout << "\t: ";
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((*HMI).second)->printSet(); cout << endl;
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cerr <<" "; printValue((*HMI).first); cerr << "\t: ";
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((*HMI).second)->printSet(); cerr << endl;
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}
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}
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}
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@ -36,7 +36,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
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void PhyRegAlloc::createIGNodeListsAndIGs()
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{
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if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
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if(DEBUG_RA ) cerr << "Creating LR lists ..." << endl;
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// hash map iterator
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LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
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@ -52,8 +52,8 @@ void PhyRegAlloc::createIGNodeListsAndIGs()
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if( !L) {
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if( DEBUG_RA) {
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cout << "\n*?!?Warning: Null liver range found for: ";
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printValue( (*HMI).first) ; cout << endl;
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cerr << "\n*?!?Warning: Null liver range found for: ";
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printValue( (*HMI).first) ; cerr << endl;
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}
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continue;
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}
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@ -75,7 +75,7 @@ void PhyRegAlloc::createIGNodeListsAndIGs()
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RegClassList[ rc ]->createInterferenceGraph();
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if( DEBUG_RA)
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cout << "LRLists Created!" << endl;
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cerr << "LRLists Created!" << endl;
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}
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@ -105,8 +105,8 @@ void PhyRegAlloc::addInterference(const Value *const Def,
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for( ; LIt != LVSet->end(); ++LIt) {
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if( DEBUG_RA > 1) {
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cout << "< Def="; printValue(Def);
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cout << ", Lvar="; printValue( *LIt); cout << "> ";
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cerr << "< Def="; printValue(Def);
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cerr << ", Lvar="; printValue( *LIt); cerr << "> ";
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}
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// get the live range corresponding to live var
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@ -133,8 +133,8 @@ void PhyRegAlloc::addInterference(const Value *const Def,
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else if(DEBUG_RA > 1) {
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// we will not have LRs for values not explicitly allocated in the
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// instruction stream (e.g., constants)
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cout << " warning: no live range for " ;
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printValue( *LIt); cout << endl; }
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cerr << " warning: no live range for " ;
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printValue( *LIt); cerr << endl; }
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}
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@ -148,7 +148,7 @@ void PhyRegAlloc::addInterference(const Value *const Def,
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void PhyRegAlloc::buildInterferenceGraphs()
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{
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if(DEBUG_RA) cout << "Creating interference graphs ..." << endl;
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if(DEBUG_RA) cerr << "Creating interference graphs ..." << endl;
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Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
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@ -215,7 +215,7 @@ void PhyRegAlloc::buildInterferenceGraphs()
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addInterferencesForArgs(); // add interference for method args
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if( DEBUG_RA)
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cout << "Interference graphs calculted!" << endl;
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cerr << "Interference graphs calculted!" << endl;
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}
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@ -241,8 +241,8 @@ void PhyRegAlloc::addInterferencesForArgs()
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addInterference( *ArgIt, InSet, false ); // add interferences between
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// args and LVars at start
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if( DEBUG_RA > 1) {
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cout << " - %% adding interference for argument ";
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printValue( (const Value *) *ArgIt); cout << endl;
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cerr << " - %% adding interference for argument ";
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printValue( (const Value *) *ArgIt); cerr << endl;
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}
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}
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}
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@ -326,7 +326,7 @@ void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
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PushedRegSet.insert( Reg );
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StackOff += 4; // ****TODO: Correct ??????
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cout << "Inserted caller saving instr");
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cerr << "Inserted caller saving instr");
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} // if not already pushed
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@ -378,9 +378,9 @@ void PhyRegAlloc::updateMachineCode()
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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cout << "*ADDED instr opcode: ";
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cout << TargetInstrDescriptors[(*AdIt)->getOpCode()].opCodeString;
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cout << endl;
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cerr << "*ADDED instr opcode: ";
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cerr << TargetInstrDescriptors[(*AdIt)->getOpCode()].opCodeString;
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cerr << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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@ -409,7 +409,7 @@ void PhyRegAlloc::updateMachineCode()
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// delete this condition checking later (must assert if Val is null)
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if( !Val) {
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if (DEBUG_RA)
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cout << "Warning: NULL Value found for operand" << endl;
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cerr << "Warning: NULL Value found for operand" << endl;
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continue;
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}
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assert( Val && "Value is NULL");
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@ -421,8 +421,8 @@ void PhyRegAlloc::updateMachineCode()
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// nothing to worry if it's a const or a label
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if (DEBUG_RA) {
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cout << "*NO LR for inst opcode: ";
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cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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cerr << "*NO LR for inst opcode: ";
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cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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}
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if( Op.getAllocatedRegNum() == -1)
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@ -442,16 +442,16 @@ void PhyRegAlloc::updateMachineCode()
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//TM.getInstrInfo().isReturn(MInst->getOpCode())
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else if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ) {
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if (DEBUG_RA) cout << endl << "RETURN found" << endl;
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if (DEBUG_RA) cerr << endl << "RETURN found" << endl;
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Op.setRegForValue( MRI.getReturnAddressReg() );
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}
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if (Val->getValueType() == Value::InstructionVal)
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{
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cout << "!Warning: No LiveRange for: ";
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printValue( Val); cout << " Type: " << Val->getValueType();
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cout << " RegVal=" << Op.getAllocatedRegNum() << endl;
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cerr << "!Warning: No LiveRange for: ";
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printValue( Val); cerr << " Type: " << Val->getValueType();
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cerr << " RegVal=" << Op.getAllocatedRegNum() << endl;
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}
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#endif
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@ -483,14 +483,14 @@ void PhyRegAlloc::updateMachineCode()
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void PhyRegAlloc::printMachineCode()
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{
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cout << endl << ";************** Method ";
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cout << Meth->getName() << " *****************" << endl;
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cerr << endl << ";************** Method ";
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cerr << Meth->getName() << " *****************" << endl;
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Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
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for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
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cout << endl ; printLabel( *BBI); cout << ": ";
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cerr << endl ; printLabel( *BBI); cerr << ": ";
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// get the iterator for machine instructions
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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@ -502,8 +502,8 @@ void PhyRegAlloc::printMachineCode()
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MachineInstr *const MInst = *MInstIterator;
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cout << endl << "\t";
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cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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cerr << endl << "\t";
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cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
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@ -519,14 +519,14 @@ void PhyRegAlloc::printMachineCode()
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const Value *const Val = Op.getVRegValue () ;
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// ****this code is temporary till NULL Values are fixed
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if( ! Val ) {
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cout << "\t<*NULL*>";
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cerr << "\t<*NULL*>";
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continue;
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}
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// if a label or a constant
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if( (Val->getValueType() == Value::BasicBlockVal) ) {
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cout << "\t"; printLabel( Op.getVRegValue () );
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cerr << "\t"; printLabel( Op.getVRegValue () );
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}
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else {
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// else it must be a register value
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@ -534,27 +534,27 @@ void PhyRegAlloc::printMachineCode()
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//if( RegNum != 1000)
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cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
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// else cout << "\t<*NoReg*>";
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cerr << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
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// else cerr << "\t<*NoReg*>";
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}
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}
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else if(Op.getOperandType() == MachineOperand::MO_MachineRegister) {
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cout << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
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cerr << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
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}
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else
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cout << "\t" << Op; // use dump field
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cerr << "\t" << Op; // use dump field
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}
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}
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cout << endl;
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cerr << endl;
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}
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cout << endl;
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cerr << endl;
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}
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@ -617,9 +617,9 @@ void PhyRegAlloc::colorIncomingArgs()
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void PhyRegAlloc::printLabel(const Value *const Val)
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{
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if( Val->hasName() )
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cout << Val->getName();
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cerr << Val->getName();
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else
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cout << "Label" << Val;
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cerr << "Label" << Val;
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}
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|
||||
@ -9,7 +9,7 @@ RegClass::RegClass(const Method *const M,
|
||||
IG(this), IGNodeStack(), ReservedColorList(RCL)
|
||||
{
|
||||
if( DEBUG_RA)
|
||||
cout << "Created Reg Class: " << RegClassID << endl;
|
||||
cerr << "Created Reg Class: " << RegClassID << endl;
|
||||
|
||||
// This constructor inits IG. The actual matrix is created by a call to
|
||||
// createInterferenceGraph() above.
|
||||
@ -21,7 +21,7 @@ RegClass::RegClass(const Method *const M,
|
||||
|
||||
void RegClass::colorAllRegs()
|
||||
{
|
||||
if(DEBUG_RA) cout << "Coloring IGs ..." << endl;
|
||||
if(DEBUG_RA) cerr << "Coloring IGs ..." << endl;
|
||||
|
||||
//preColorIGNodes(); // pre-color IGNodes
|
||||
pushAllIGNodes(); // push all IG Nodes
|
||||
@ -55,9 +55,9 @@ void RegClass::pushAllIGNodes()
|
||||
bool PushedAll = pushUnconstrainedIGNodes();
|
||||
|
||||
if( DEBUG_RA) {
|
||||
cout << " Puhsed all-unconstrained IGNodes. ";
|
||||
if( PushedAll ) cout << " No constrained nodes left.";
|
||||
cout << endl;
|
||||
cerr << " Puhsed all-unconstrained IGNodes. ";
|
||||
if( PushedAll ) cerr << " No constrained nodes left.";
|
||||
cerr << endl;
|
||||
}
|
||||
|
||||
if( PushedAll ) // if NO constrained nodes left
|
||||
@ -112,8 +112,8 @@ bool RegClass::pushUnconstrainedIGNodes()
|
||||
IGNode->pushOnStack(); // set OnStack and dec deg of neighs
|
||||
|
||||
if (DEBUG_RA > 1) {
|
||||
cout << " pushed un-constrained IGNode " << IGNode->getIndex() ;
|
||||
cout << " on to stack" << endl;
|
||||
cerr << " pushed un-constrained IGNode " << IGNode->getIndex() ;
|
||||
cerr << " on to stack" << endl;
|
||||
}
|
||||
}
|
||||
else pushedall = false; // we didn't push all live ranges
|
||||
@ -170,16 +170,16 @@ void RegClass::colorIGNode(IGNode *const Node)
|
||||
}
|
||||
else {
|
||||
if( DEBUG_RA ) {
|
||||
cout << " Node " << Node->getIndex();
|
||||
cout << " already colored with color " << Node->getColor() << endl;
|
||||
cerr << " Node " << Node->getIndex();
|
||||
cerr << " already colored with color " << Node->getColor() << endl;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if( !Node->hasColor() ) {
|
||||
if( DEBUG_RA ) {
|
||||
cout << " Node " << Node->getIndex();
|
||||
cout << " - could not find a color (needs spilling)" << endl;
|
||||
cerr << " Node " << Node->getIndex();
|
||||
cerr << " - could not find a color (needs spilling)" << endl;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -7,7 +7,7 @@ InterferenceGraph::InterferenceGraph(RegClass *const RC) : RegCl(RC),
|
||||
IG = NULL;
|
||||
Size = 0;
|
||||
if( DEBUG_RA) {
|
||||
cout << "Interference graph created!" << endl;
|
||||
cerr << "Interference graph created!" << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -65,7 +65,7 @@ void InterferenceGraph::setInterference(const LiveRange *const LR1,
|
||||
char *val;
|
||||
|
||||
if( DEBUG_RA > 1)
|
||||
cout << "setting intf for: [" << row << "][" << col << "]" << endl;
|
||||
cerr << "setting intf for: [" << row << "][" << col << "]" << endl;
|
||||
|
||||
( row > col) ? val = &IG[row][col]: val = &IG[col][row];
|
||||
|
||||
@ -118,9 +118,9 @@ void InterferenceGraph::mergeIGNodesOfLRs(const LiveRange *const LR1,
|
||||
assertIGNode( SrcNode );
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << "Merging LRs: \""; LR1->printSet();
|
||||
cout << "\" and \""; LR2->printSet();
|
||||
cout << "\"" << endl;
|
||||
cerr << "Merging LRs: \""; LR1->printSet();
|
||||
cerr << "\" and \""; LR2->printSet();
|
||||
cerr << "\"" << endl;
|
||||
}
|
||||
|
||||
unsigned SrcDegree = SrcNode->getNumOfNeighbors();
|
||||
@ -147,10 +147,10 @@ void InterferenceGraph::mergeIGNodesOfLRs(const LiveRange *const LR1,
|
||||
setInterference(LR1, LROfNeigh );
|
||||
}
|
||||
|
||||
//cout<< " #Neighs - Neigh: ["<< NeighNode->getIndex()<< "] ";
|
||||
//cout << NeighNode->getNumOfNeighbors();
|
||||
//cout << " Dest: [" << DestNode->getIndex() << "] ";
|
||||
//cout << DestNode->getNumOfNeighbors() << endl;
|
||||
//cerr<< " #Neighs - Neigh: ["<< NeighNode->getIndex()<< "] ";
|
||||
//cerr << NeighNode->getNumOfNeighbors();
|
||||
//cerr << " Dest: [" << DestNode->getIndex() << "] ";
|
||||
//cerr << DestNode->getNumOfNeighbors() << endl;
|
||||
|
||||
}
|
||||
|
||||
@ -193,13 +193,13 @@ void InterferenceGraph::printIG() const
|
||||
if( ! Node )
|
||||
continue; // skip empty rows
|
||||
|
||||
cout << " [" << i << "] ";
|
||||
cerr << " [" << i << "] ";
|
||||
|
||||
for( unsigned int j=0; j < Size; j++) {
|
||||
if( j >= i) break;
|
||||
if( IG[i][j] ) cout << "(" << i << "," << j << ") ";
|
||||
if( IG[i][j] ) cerr << "(" << i << "," << j << ") ";
|
||||
}
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -215,10 +215,10 @@ void InterferenceGraph::printIGNodeList() const
|
||||
if( ! Node )
|
||||
continue;
|
||||
|
||||
cout << " [" << Node->getIndex() << "] ";
|
||||
cerr << " [" << Node->getIndex() << "] ";
|
||||
(Node->getParentLR())->printSet();
|
||||
//int Deg = Node->getCurDegree();
|
||||
cout << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">" << endl;
|
||||
cerr << "\t <# of Neighs: " << Node->getNumOfNeighbors() << ">" << endl;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@ -46,7 +46,7 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
{
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << "Consturcting Live Ranges ..." << endl;
|
||||
cerr << "Consturcting Live Ranges ..." << endl;
|
||||
|
||||
// first find the live ranges for all incoming args of the method since
|
||||
// those LRs start from the start of the method
|
||||
@ -75,8 +75,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << " adding LiveRange for argument ";
|
||||
printValue( (const Value *) *ArgIt); cout << endl;
|
||||
cerr << " adding LiveRange for argument ";
|
||||
printValue( (const Value *) *ArgIt); cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -124,9 +124,9 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
OpI.getMachineOperand().getOperandType();
|
||||
|
||||
if ( OpTyp == MachineOperand::MO_CCRegister) {
|
||||
cout << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
|
||||
cerr << "\n**CC reg found. Is Def=" << OpI.isDef() << " Val:";
|
||||
printValue( OpI.getMachineOperand().getVRegValue() );
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -139,8 +139,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
// Only instruction values are accepted for live ranges here
|
||||
|
||||
if( Def->getValueType() != Value::InstructionVal ) {
|
||||
cout << "\n**%%Error: Def is not an instruction val. Def=";
|
||||
printValue( Def ); cout << endl;
|
||||
cerr << "\n**%%Error: Def is not an instruction val. Def=";
|
||||
printValue( Def ); cerr << endl;
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -156,8 +156,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
LiveRangeMap[ Def ] = DefRange; // update the map
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << " creating a LR for def: ";
|
||||
printValue(Def); cout << endl;
|
||||
cerr << " creating a LR for def: ";
|
||||
printValue(Def); cerr << endl;
|
||||
}
|
||||
|
||||
// set the register class of the new live range
|
||||
@ -171,7 +171,7 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
|
||||
|
||||
if(isCC && DEBUG_RA) {
|
||||
cout << "\a**created a LR for a CC reg:";
|
||||
cerr << "\a**created a LR for a CC reg:";
|
||||
printValue( OpI.getMachineOperand().getVRegValue() );
|
||||
}
|
||||
|
||||
@ -185,8 +185,8 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
LiveRangeMap[ Def ] = DefRange;
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << " added to an existing LR for def: ";
|
||||
printValue( Def ); cout << endl;
|
||||
cerr << " added to an existing LR for def: ";
|
||||
printValue( Def ); cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -206,7 +206,7 @@ void LiveRangeInfo::constructLiveRanges()
|
||||
suggestRegs4CallRets();
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << "Initial Live Ranges constructed!" << endl;
|
||||
cerr << "Initial Live Ranges constructed!" << endl;
|
||||
|
||||
}
|
||||
|
||||
@ -257,7 +257,7 @@ void LiveRangeInfo::coalesceLRs()
|
||||
*/
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << endl << "Coalscing LRs ..." << endl;
|
||||
cerr << endl << "Coalscing LRs ..." << endl;
|
||||
|
||||
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
|
||||
|
||||
@ -274,9 +274,9 @@ void LiveRangeInfo::coalesceLRs()
|
||||
const MachineInstr * MInst = *MInstIterator;
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << " *Iterating over machine instr ";
|
||||
cerr << " *Iterating over machine instr ";
|
||||
MInst->dump();
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
}
|
||||
|
||||
|
||||
@ -298,8 +298,8 @@ void LiveRangeInfo::coalesceLRs()
|
||||
|
||||
//don't warn about labels
|
||||
if (!((*UseI)->getType())->isLabelType() && DEBUG_RA) {
|
||||
cout<<" !! Warning: No LR for use "; printValue(*UseI);
|
||||
cout << endl;
|
||||
cerr<<" !! Warning: No LR for use "; printValue(*UseI);
|
||||
cerr << endl;
|
||||
}
|
||||
continue; // ignore and continue
|
||||
}
|
||||
@ -345,7 +345,7 @@ void LiveRangeInfo::coalesceLRs()
|
||||
} // for all BBs
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << endl << "Coalscing Done!" << endl;
|
||||
cerr << endl << "Coalscing Done!" << endl;
|
||||
|
||||
}
|
||||
|
||||
@ -359,11 +359,11 @@ void LiveRangeInfo::coalesceLRs()
|
||||
void LiveRangeInfo::printLiveRanges()
|
||||
{
|
||||
LiveRangeMapType::iterator HMI = LiveRangeMap.begin(); // hash map iterator
|
||||
cout << endl << "Printing Live Ranges from Hash Map:" << endl;
|
||||
cerr << endl << "Printing Live Ranges from Hash Map:" << endl;
|
||||
for( ; HMI != LiveRangeMap.end() ; HMI ++ ) {
|
||||
if( (*HMI).first && (*HMI).second ) {
|
||||
cout <<" "; printValue((*HMI).first); cout << "\t: ";
|
||||
((*HMI).second)->printSet(); cout << endl;
|
||||
cerr <<" "; printValue((*HMI).first); cerr << "\t: ";
|
||||
((*HMI).second)->printSet(); cerr << endl;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -36,7 +36,7 @@ PhyRegAlloc::PhyRegAlloc(const Method *const M,
|
||||
|
||||
void PhyRegAlloc::createIGNodeListsAndIGs()
|
||||
{
|
||||
if(DEBUG_RA ) cout << "Creating LR lists ..." << endl;
|
||||
if(DEBUG_RA ) cerr << "Creating LR lists ..." << endl;
|
||||
|
||||
// hash map iterator
|
||||
LiveRangeMapType::const_iterator HMI = (LRI.getLiveRangeMap())->begin();
|
||||
@ -52,8 +52,8 @@ void PhyRegAlloc::createIGNodeListsAndIGs()
|
||||
|
||||
if( !L) {
|
||||
if( DEBUG_RA) {
|
||||
cout << "\n*?!?Warning: Null liver range found for: ";
|
||||
printValue( (*HMI).first) ; cout << endl;
|
||||
cerr << "\n*?!?Warning: Null liver range found for: ";
|
||||
printValue( (*HMI).first) ; cerr << endl;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
@ -75,7 +75,7 @@ void PhyRegAlloc::createIGNodeListsAndIGs()
|
||||
RegClassList[ rc ]->createInterferenceGraph();
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << "LRLists Created!" << endl;
|
||||
cerr << "LRLists Created!" << endl;
|
||||
}
|
||||
|
||||
|
||||
@ -105,8 +105,8 @@ void PhyRegAlloc::addInterference(const Value *const Def,
|
||||
for( ; LIt != LVSet->end(); ++LIt) {
|
||||
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << "< Def="; printValue(Def);
|
||||
cout << ", Lvar="; printValue( *LIt); cout << "> ";
|
||||
cerr << "< Def="; printValue(Def);
|
||||
cerr << ", Lvar="; printValue( *LIt); cerr << "> ";
|
||||
}
|
||||
|
||||
// get the live range corresponding to live var
|
||||
@ -133,8 +133,8 @@ void PhyRegAlloc::addInterference(const Value *const Def,
|
||||
else if(DEBUG_RA > 1) {
|
||||
// we will not have LRs for values not explicitly allocated in the
|
||||
// instruction stream (e.g., constants)
|
||||
cout << " warning: no live range for " ;
|
||||
printValue( *LIt); cout << endl; }
|
||||
cerr << " warning: no live range for " ;
|
||||
printValue( *LIt); cerr << endl; }
|
||||
|
||||
}
|
||||
|
||||
@ -148,7 +148,7 @@ void PhyRegAlloc::addInterference(const Value *const Def,
|
||||
void PhyRegAlloc::buildInterferenceGraphs()
|
||||
{
|
||||
|
||||
if(DEBUG_RA) cout << "Creating interference graphs ..." << endl;
|
||||
if(DEBUG_RA) cerr << "Creating interference graphs ..." << endl;
|
||||
|
||||
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
|
||||
|
||||
@ -215,7 +215,7 @@ void PhyRegAlloc::buildInterferenceGraphs()
|
||||
addInterferencesForArgs(); // add interference for method args
|
||||
|
||||
if( DEBUG_RA)
|
||||
cout << "Interference graphs calculted!" << endl;
|
||||
cerr << "Interference graphs calculted!" << endl;
|
||||
|
||||
}
|
||||
|
||||
@ -241,8 +241,8 @@ void PhyRegAlloc::addInterferencesForArgs()
|
||||
addInterference( *ArgIt, InSet, false ); // add interferences between
|
||||
// args and LVars at start
|
||||
if( DEBUG_RA > 1) {
|
||||
cout << " - %% adding interference for argument ";
|
||||
printValue( (const Value *) *ArgIt); cout << endl;
|
||||
cerr << " - %% adding interference for argument ";
|
||||
printValue( (const Value *) *ArgIt); cerr << endl;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -326,7 +326,7 @@ void PhyRegAlloc::insertCallerSavingCode(const MachineInstr *MInst,
|
||||
|
||||
PushedRegSet.insert( Reg );
|
||||
StackOff += 4; // ****TODO: Correct ??????
|
||||
cout << "Inserted caller saving instr");
|
||||
cerr << "Inserted caller saving instr");
|
||||
|
||||
} // if not already pushed
|
||||
|
||||
@ -378,9 +378,9 @@ void PhyRegAlloc::updateMachineCode()
|
||||
|
||||
for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
|
||||
|
||||
cout << "*ADDED instr opcode: ";
|
||||
cout << TargetInstrDescriptors[(*AdIt)->getOpCode()].opCodeString;
|
||||
cout << endl;
|
||||
cerr << "*ADDED instr opcode: ";
|
||||
cerr << TargetInstrDescriptors[(*AdIt)->getOpCode()].opCodeString;
|
||||
cerr << endl;
|
||||
|
||||
MInstIterator = MIVec.insert( MInstIterator, *AdIt );
|
||||
++MInstIterator;
|
||||
@ -409,7 +409,7 @@ void PhyRegAlloc::updateMachineCode()
|
||||
// delete this condition checking later (must assert if Val is null)
|
||||
if( !Val) {
|
||||
if (DEBUG_RA)
|
||||
cout << "Warning: NULL Value found for operand" << endl;
|
||||
cerr << "Warning: NULL Value found for operand" << endl;
|
||||
continue;
|
||||
}
|
||||
assert( Val && "Value is NULL");
|
||||
@ -421,8 +421,8 @@ void PhyRegAlloc::updateMachineCode()
|
||||
// nothing to worry if it's a const or a label
|
||||
|
||||
if (DEBUG_RA) {
|
||||
cout << "*NO LR for inst opcode: ";
|
||||
cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
|
||||
cerr << "*NO LR for inst opcode: ";
|
||||
cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
|
||||
}
|
||||
|
||||
if( Op.getAllocatedRegNum() == -1)
|
||||
@ -442,16 +442,16 @@ void PhyRegAlloc::updateMachineCode()
|
||||
|
||||
//TM.getInstrInfo().isReturn(MInst->getOpCode())
|
||||
else if(TM.getInstrInfo().isReturn(MInst->getOpCode()) ) {
|
||||
if (DEBUG_RA) cout << endl << "RETURN found" << endl;
|
||||
if (DEBUG_RA) cerr << endl << "RETURN found" << endl;
|
||||
Op.setRegForValue( MRI.getReturnAddressReg() );
|
||||
|
||||
}
|
||||
|
||||
if (Val->getValueType() == Value::InstructionVal)
|
||||
{
|
||||
cout << "!Warning: No LiveRange for: ";
|
||||
printValue( Val); cout << " Type: " << Val->getValueType();
|
||||
cout << " RegVal=" << Op.getAllocatedRegNum() << endl;
|
||||
cerr << "!Warning: No LiveRange for: ";
|
||||
printValue( Val); cerr << " Type: " << Val->getValueType();
|
||||
cerr << " RegVal=" << Op.getAllocatedRegNum() << endl;
|
||||
}
|
||||
|
||||
#endif
|
||||
@ -483,14 +483,14 @@ void PhyRegAlloc::updateMachineCode()
|
||||
void PhyRegAlloc::printMachineCode()
|
||||
{
|
||||
|
||||
cout << endl << ";************** Method ";
|
||||
cout << Meth->getName() << " *****************" << endl;
|
||||
cerr << endl << ";************** Method ";
|
||||
cerr << Meth->getName() << " *****************" << endl;
|
||||
|
||||
Method::const_iterator BBI = Meth->begin(); // random iterator for BBs
|
||||
|
||||
for( ; BBI != Meth->end(); ++BBI) { // traverse BBs in random order
|
||||
|
||||
cout << endl ; printLabel( *BBI); cout << ": ";
|
||||
cerr << endl ; printLabel( *BBI); cerr << ": ";
|
||||
|
||||
// get the iterator for machine instructions
|
||||
MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
|
||||
@ -502,8 +502,8 @@ void PhyRegAlloc::printMachineCode()
|
||||
MachineInstr *const MInst = *MInstIterator;
|
||||
|
||||
|
||||
cout << endl << "\t";
|
||||
cout << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
|
||||
cerr << endl << "\t";
|
||||
cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
|
||||
|
||||
|
||||
//for(MachineInstr::val_op_const_iterator OpI(MInst);!OpI.done();++OpI) {
|
||||
@ -519,14 +519,14 @@ void PhyRegAlloc::printMachineCode()
|
||||
const Value *const Val = Op.getVRegValue () ;
|
||||
// ****this code is temporary till NULL Values are fixed
|
||||
if( ! Val ) {
|
||||
cout << "\t<*NULL*>";
|
||||
cerr << "\t<*NULL*>";
|
||||
continue;
|
||||
}
|
||||
|
||||
// if a label or a constant
|
||||
if( (Val->getValueType() == Value::BasicBlockVal) ) {
|
||||
|
||||
cout << "\t"; printLabel( Op.getVRegValue () );
|
||||
cerr << "\t"; printLabel( Op.getVRegValue () );
|
||||
}
|
||||
else {
|
||||
// else it must be a register value
|
||||
@ -534,27 +534,27 @@ void PhyRegAlloc::printMachineCode()
|
||||
|
||||
//if( RegNum != 1000)
|
||||
|
||||
cout << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
|
||||
// else cout << "\t<*NoReg*>";
|
||||
cerr << "\t" << "%" << MRI.getUnifiedRegName( RegNum );
|
||||
// else cerr << "\t<*NoReg*>";
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
else if(Op.getOperandType() == MachineOperand::MO_MachineRegister) {
|
||||
cout << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
|
||||
cerr << "\t" << "%" << MRI.getUnifiedRegName(Op.getMachineRegNum());
|
||||
}
|
||||
|
||||
else
|
||||
cout << "\t" << Op; // use dump field
|
||||
cerr << "\t" << Op; // use dump field
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
|
||||
}
|
||||
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
}
|
||||
|
||||
|
||||
@ -617,9 +617,9 @@ void PhyRegAlloc::colorIncomingArgs()
|
||||
void PhyRegAlloc::printLabel(const Value *const Val)
|
||||
{
|
||||
if( Val->hasName() )
|
||||
cout << Val->getName();
|
||||
cerr << Val->getName();
|
||||
else
|
||||
cout << "Label" << Val;
|
||||
cerr << "Label" << Val;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -9,7 +9,7 @@ RegClass::RegClass(const Method *const M,
|
||||
IG(this), IGNodeStack(), ReservedColorList(RCL)
|
||||
{
|
||||
if( DEBUG_RA)
|
||||
cout << "Created Reg Class: " << RegClassID << endl;
|
||||
cerr << "Created Reg Class: " << RegClassID << endl;
|
||||
|
||||
// This constructor inits IG. The actual matrix is created by a call to
|
||||
// createInterferenceGraph() above.
|
||||
@ -21,7 +21,7 @@ RegClass::RegClass(const Method *const M,
|
||||
|
||||
void RegClass::colorAllRegs()
|
||||
{
|
||||
if(DEBUG_RA) cout << "Coloring IGs ..." << endl;
|
||||
if(DEBUG_RA) cerr << "Coloring IGs ..." << endl;
|
||||
|
||||
//preColorIGNodes(); // pre-color IGNodes
|
||||
pushAllIGNodes(); // push all IG Nodes
|
||||
@ -55,9 +55,9 @@ void RegClass::pushAllIGNodes()
|
||||
bool PushedAll = pushUnconstrainedIGNodes();
|
||||
|
||||
if( DEBUG_RA) {
|
||||
cout << " Puhsed all-unconstrained IGNodes. ";
|
||||
if( PushedAll ) cout << " No constrained nodes left.";
|
||||
cout << endl;
|
||||
cerr << " Puhsed all-unconstrained IGNodes. ";
|
||||
if( PushedAll ) cerr << " No constrained nodes left.";
|
||||
cerr << endl;
|
||||
}
|
||||
|
||||
if( PushedAll ) // if NO constrained nodes left
|
||||
@ -112,8 +112,8 @@ bool RegClass::pushUnconstrainedIGNodes()
|
||||
IGNode->pushOnStack(); // set OnStack and dec deg of neighs
|
||||
|
||||
if (DEBUG_RA > 1) {
|
||||
cout << " pushed un-constrained IGNode " << IGNode->getIndex() ;
|
||||
cout << " on to stack" << endl;
|
||||
cerr << " pushed un-constrained IGNode " << IGNode->getIndex() ;
|
||||
cerr << " on to stack" << endl;
|
||||
}
|
||||
}
|
||||
else pushedall = false; // we didn't push all live ranges
|
||||
@ -170,16 +170,16 @@ void RegClass::colorIGNode(IGNode *const Node)
|
||||
}
|
||||
else {
|
||||
if( DEBUG_RA ) {
|
||||
cout << " Node " << Node->getIndex();
|
||||
cout << " already colored with color " << Node->getColor() << endl;
|
||||
cerr << " Node " << Node->getIndex();
|
||||
cerr << " already colored with color " << Node->getColor() << endl;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if( !Node->hasColor() ) {
|
||||
if( DEBUG_RA ) {
|
||||
cout << " Node " << Node->getIndex();
|
||||
cout << " - could not find a color (needs spilling)" << endl;
|
||||
cerr << " Node " << Node->getIndex();
|
||||
cerr << " - could not find a color (needs spilling)" << endl;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -269,17 +269,14 @@ class UltraSparcRegInfo : public MachineRegInfo
|
||||
else if( ty <= Type::DoubleTyID)
|
||||
res = FloatRegClassID; // sparc float reg class
|
||||
else {
|
||||
cout << "TypeID: " << ty << endl;
|
||||
cerr << "TypeID: " << ty << endl;
|
||||
assert(0 && "Cannot resolve register class for type");
|
||||
|
||||
}
|
||||
|
||||
if(isCCReg)
|
||||
return res + 2; // corresponidng condition code regiser
|
||||
|
||||
else
|
||||
return res;
|
||||
|
||||
}
|
||||
|
||||
// returns the register tha contains always zero
|
||||
|
||||
@ -43,8 +43,8 @@ void SparcIntRegClass::colorIGNode(IGNode * Node, bool IsColorUsedArr[]) const
|
||||
return;
|
||||
}
|
||||
else { // can't allocate the suggested col
|
||||
cout << " Coud NOT allocate the suggested color for LR ";
|
||||
LR->printSet(); cout << endl;
|
||||
cerr << " Could NOT allocate the suggested color for LR ";
|
||||
LR->printSet(); cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
@ -193,8 +193,8 @@ void SparcFloatRegClass::colorIGNode(IGNode * Node,bool IsColorUsedArr[]) const
|
||||
return;
|
||||
}
|
||||
else { // can't allocate the suggested col
|
||||
cout << " Coud NOT allocate the suggested color for LR ";
|
||||
LR->printSet(); cout << endl;
|
||||
cerr << " Could NOT allocate the suggested color for LR ";
|
||||
LR->printSet(); cerr << endl;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -102,7 +102,7 @@ void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
|
||||
|
||||
else {
|
||||
// Do NOTHING as this will be colored as a normal value.
|
||||
if (DEBUG_RA) cout << " Int Regr not suggested for method arg\n";
|
||||
if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
|
||||
}
|
||||
|
||||
}
|
||||
@ -288,8 +288,8 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
|
||||
// must be defined before
|
||||
if( !LR ) {
|
||||
if( DEBUG_RA) {
|
||||
cout << " ERROR: In call instr, no LR for arg: " ;
|
||||
printValue(CallArg); cout << endl;
|
||||
cerr << " ERROR: In call instr, no LR for arg: " ;
|
||||
printValue(CallArg); cerr << endl;
|
||||
}
|
||||
assert(0 && "NO LR for call arg");
|
||||
// continue;
|
||||
@ -305,7 +305,7 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
|
||||
|
||||
else if (DEBUG_RA)
|
||||
// Do NOTHING as this will be colored as a normal value.
|
||||
cout << " Regr not suggested for int call arg" << endl;
|
||||
cerr << " Regr not suggested for int call arg" << endl;
|
||||
|
||||
}
|
||||
else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
|
||||
@ -357,9 +357,9 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
|
||||
|
||||
if( !RetValLR ) {
|
||||
cout << "\nNo LR for:";
|
||||
cerr << "\nNo LR for:";
|
||||
printValue( RetVal );
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
assert( RetValLR && "ERR:No LR for non-void return value");
|
||||
//return;
|
||||
}
|
||||
@ -449,8 +449,8 @@ void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
||||
// must be defined before
|
||||
if( !LR ) {
|
||||
if( DEBUG_RA) {
|
||||
cout << " ERROR: In call instr, no LR for arg: " ;
|
||||
printValue(CallArg); cout << endl;
|
||||
cerr << " ERROR: In call instr, no LR for arg: " ;
|
||||
printValue(CallArg); cerr << endl;
|
||||
}
|
||||
assert(0 && "NO LR for call arg");
|
||||
// continue;
|
||||
@ -516,9 +516,9 @@ void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
|
||||
LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
|
||||
|
||||
if( !LR ) {
|
||||
cout << "\nNo LR for:";
|
||||
cerr << "\nNo LR for:";
|
||||
printValue( RetVal );
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
assert( LR && "No LR for return value of non-void method");
|
||||
//return;
|
||||
}
|
||||
@ -554,9 +554,9 @@ void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
|
||||
LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
|
||||
|
||||
if( ! LR ) {
|
||||
cout << "\nNo LR for:";
|
||||
cerr << "\nNo LR for:";
|
||||
printValue( RetVal );
|
||||
cout << endl;
|
||||
cerr << endl;
|
||||
// assert( LR && "No LR for return value of non-void method");
|
||||
return;
|
||||
}
|
||||
@ -684,7 +684,7 @@ MachineInstr * UltraSparcRegInfo::cpValue2RegMI(Value * Val,
|
||||
break;
|
||||
|
||||
default:
|
||||
cout << "Value Type: " << Val->getValueType() << endl;
|
||||
cerr << "Value Type: " << Val->getValueType() << endl;
|
||||
assert(0 && "Unknown val type - Only constants/globals/labels are valid");
|
||||
}
|
||||
|
||||
@ -736,33 +736,26 @@ void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
|
||||
|
||||
unsigned RegClassID = (LR->getRegClass())->getID();
|
||||
|
||||
cout << " *Node " << (LR->getUserIGNode())->getIndex();
|
||||
cerr << " *Node " << (LR->getUserIGNode())->getIndex();
|
||||
|
||||
if( ! LR->hasColor() ) {
|
||||
cout << " - could not find a color" << endl;
|
||||
cerr << " - could not find a color" << endl;
|
||||
return;
|
||||
}
|
||||
|
||||
// if a color is found
|
||||
|
||||
cout << " colored with color "<< LR->getColor();
|
||||
cerr << " colored with color "<< LR->getColor();
|
||||
|
||||
if( RegClassID == IntRegClassID ) {
|
||||
|
||||
cout<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
|
||||
cout << "]" << endl;
|
||||
cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
|
||||
cerr << "]" << endl;
|
||||
}
|
||||
else if ( RegClassID == FloatRegClassID) {
|
||||
cout << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
|
||||
cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
|
||||
if( LR->getTypeID() == Type::DoubleTyID )
|
||||
cout << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
|
||||
cout << "]" << endl;
|
||||
cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
|
||||
cerr << "]" << endl;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
@ -47,8 +47,8 @@ void AllocateRegisters(Method *M, TargetMachine &TM)
|
||||
return;
|
||||
|
||||
if( DEBUG_RA ) {
|
||||
cout << endl << "******************** Method "<< (M)->getName();
|
||||
cout << " ********************" <<endl;
|
||||
cerr << endl << "******************** Method "<< (M)->getName();
|
||||
cerr << " ********************" <<endl;
|
||||
}
|
||||
|
||||
MethodLiveVarInfo LVI(M ); // Analyze live varaibles
|
||||
@ -59,7 +59,7 @@ void AllocateRegisters(Method *M, TargetMachine &TM)
|
||||
PRA.allocateRegisters();
|
||||
|
||||
|
||||
if( DEBUG_RA ) cout << endl << "Register allocation complete!" << endl;
|
||||
if( DEBUG_RA ) cerr << endl << "Register allocation complete!" << endl;
|
||||
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user