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Minor cleanups
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15091 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -28,8 +28,8 @@
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "twoaddrinstr"
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#define DEBUG_TYPE "twoaddrinstr"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/LiveVariables.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstr.h"
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@ -105,13 +105,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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"two address instruction invalid");
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"two address instruction invalid");
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// if the two operands are the same we just remove the use
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// if the two operands are the same we just remove the use
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// and mark the def as def&use
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// and mark the def as def&use, otherwise we have to insert a copy.
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if (mi->getOperand(0).getReg() ==
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if (mi->getOperand(0).getReg() != mi->getOperand(1).getReg()) {
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mi->getOperand(1).getReg()) {
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}
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else {
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MadeChange = true;
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// rewrite:
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// rewrite:
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// a = b op c
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// a = b op c
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// to:
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// to:
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@ -128,9 +123,11 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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// instruction (a = b + a for example) because our
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// instruction (a = b + a for example) because our
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// transformation will not work. This should never occur
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// transformation will not work. This should never occur
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// because we are in SSA form.
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// because we are in SSA form.
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#ifndef NDEBUG
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for (unsigned i = 1; i != mi->getNumOperands(); ++i)
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for (unsigned i = 1; i != mi->getNumOperands(); ++i)
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assert(!mi->getOperand(i).isRegister() ||
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assert(!mi->getOperand(i).isRegister() ||
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mi->getOperand(i).getReg() != regA);
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mi->getOperand(i).getReg() != regA);
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#endif
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const TargetRegisterClass* rc =
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const TargetRegisterClass* rc =
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MF.getSSARegMap()->getRegClass(regA);
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MF.getSSARegMap()->getRegClass(regA);
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@ -167,6 +164,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
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assert(mi->getOperand(0).isDef());
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assert(mi->getOperand(0).isDef());
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mi->getOperand(0).setUse();
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mi->getOperand(0).setUse();
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mi->RemoveOperand(1);
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mi->RemoveOperand(1);
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MadeChange = true;
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DEBUG(std::cerr << "\t\trewrite to:\t";
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DEBUG(std::cerr << "\t\trewrite to:\t";
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mi->print(std::cerr, &TM));
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mi->print(std::cerr, &TM));
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