[mc] Clean up emission of byte sequences

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235178 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2015-04-17 11:12:43 +00:00
parent eea5a135ff
commit 1e5490b167
7 changed files with 7 additions and 26 deletions

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@ -412,10 +412,7 @@ void ELFObjectWriter::WriteHeader(const MCAssembler &Asm,
// emitWord method behaves differently for ELF32 and ELF64, writing // emitWord method behaves differently for ELF32 and ELF64, writing
// 4 bytes in the former and 8 in the latter. // 4 bytes in the former and 8 in the latter.
Write8(0x7f); // e_ident[EI_MAG0] WriteBytes(ELF::ElfMagic); // e_ident[EI_MAG0] to e_ident[EI_MAG3]
Write8('E'); // e_ident[EI_MAG1]
Write8('L'); // e_ident[EI_MAG2]
Write8('F'); // e_ident[EI_MAG3]
Write8(is64Bit() ? ELF::ELFCLASS64 : ELF::ELFCLASS32); // e_ident[EI_CLASS] Write8(is64Bit() ? ELF::ELFCLASS64 : ELF::ELFCLASS32); // e_ident[EI_CLASS]

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@ -915,8 +915,7 @@ void MachObjectWriter::WriteObject(MCAssembler &Asm,
Asm.writeSectionData(it, Layout); Asm.writeSectionData(it, Layout);
uint64_t Pad = getPaddingSize(it, Layout); uint64_t Pad = getPaddingSize(it, Layout);
for (unsigned int i = 0; i < Pad; ++i) WriteZeros(Pad);
Write8(0);
} }
// Write the extra padding. // Write the extra padding.

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@ -530,8 +530,7 @@ void WinCOFFObjectWriter::WriteFileHeader(const COFF::header &Header) {
WriteLE16(COFF::BigObjHeader::MinBigObjectVersion); WriteLE16(COFF::BigObjHeader::MinBigObjectVersion);
WriteLE16(Header.Machine); WriteLE16(Header.Machine);
WriteLE32(Header.TimeDateStamp); WriteLE32(Header.TimeDateStamp);
for (uint8_t MagicChar : COFF::BigObjMagic) WriteBytes(StringRef(COFF::BigObjMagic, sizeof(COFF::BigObjMagic)));
Write8(MagicChar);
WriteLE32(0); WriteLE32(0);
WriteLE32(0); WriteLE32(0);
WriteLE32(0); WriteLE32(0);

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@ -247,10 +247,7 @@ bool AArch64AsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
// If the count is not 4-byte aligned, we must be writing data into the text // If the count is not 4-byte aligned, we must be writing data into the text
// section (otherwise we have unaligned instructions, and thus have far // section (otherwise we have unaligned instructions, and thus have far
// bigger problems), so just write zeros instead. // bigger problems), so just write zeros instead.
if ((Count & 3) != 0) { OW->WriteZeros(Count % 4);
for (uint64_t i = 0, e = (Count & 3); i != e; ++i)
OW->Write8(0);
}
// We are properly aligned, so write NOPs as requested. // We are properly aligned, so write NOPs as requested.
Count /= 4; Count /= 4;

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@ -394,12 +394,7 @@ bool MipsAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
// If the count is not 4-byte aligned, we must be writing data into the text // If the count is not 4-byte aligned, we must be writing data into the text
// section (otherwise we have unaligned instructions, and thus have far // section (otherwise we have unaligned instructions, and thus have far
// bigger problems), so just write zeros instead. // bigger problems), so just write zeros instead.
for (uint64_t i = 0, e = Count % 4; i != e; ++i) OW->WriteZeros(Count);
OW->Write8(0);
uint64_t NumNops = Count / 4;
for (uint64_t i = 0; i != NumNops; ++i)
OW->Write32(0);
return true; return true;
} }

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@ -178,12 +178,7 @@ public:
for (uint64_t i = 0; i != NumNops; ++i) for (uint64_t i = 0; i != NumNops; ++i)
OW->Write32(0x60000000); OW->Write32(0x60000000);
switch (Count % 4) { OW->WriteZeros(Count % 4);
default: break; // No leftover bytes to write
case 1: OW->Write8(0); break;
case 2: OW->Write16(0); break;
case 3: OW->Write16(0); OW->Write8(0); break;
}
return true; return true;
} }

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@ -115,8 +115,7 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
} }
bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const { bool AMDGPUAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
for (unsigned i = 0; i < Count; ++i) OW->WriteZeros(Count);
OW->Write8(0);
return true; return true;
} }