From 1e67d4d7bae24793de849a5a97f7e194fd2f741a Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Thu, 19 Aug 2004 08:07:50 +0000 Subject: [PATCH] Convert casts that will have no effect into move instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPC32ISelSimple.cpp | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index f3eec4a8686..a2ba0409727 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -2580,7 +2580,7 @@ void ISel::visitCastInst(CastInst &CI) { unsigned DestClass = getClassB(CI.getType()); // If this is a cast from a 32-bit integer to a Long type, and the only uses - // of the case are GEP instructions, then the cast does not need to be + // of the cast are GEP instructions, then the cast does not need to be // generated explicitly, it will be folded into the GEP. if (DestClass == cLong && SrcClass == cInt) { bool AllUsesAreGEPs = true; @@ -2589,13 +2589,31 @@ void ISel::visitCastInst(CastInst &CI) { AllUsesAreGEPs = false; break; } - - // No need to codegen this cast if all users are getelementptr instrs... if (AllUsesAreGEPs) return; } - + unsigned DestReg = getReg(CI); MachineBasicBlock::iterator MI = BB->end(); + + // If this is a cast from an byte, short, or int to an integer type of equal + // or lesser width, and all uses of the cast are store instructions then dont + // emit them, as the store instruction will implicitly not store the zero or + // sign extended bytes. + if (SrcClass <= cInt && SrcClass >= DestClass) { + bool AllUsesAreStoresOrSetCC = true; + for (Value::use_iterator I = CI.use_begin(), E = CI.use_end(); I != E; ++I) + if (!isa(*I) && !isa(*I)) { + AllUsesAreStoresOrSetCC = false; + break; + } + // Turn this cast directly into a move instruction, which the register + // allocator will deal with. + if (AllUsesAreStoresOrSetCC) { + unsigned SrcReg = getReg(Op, BB, MI); + BuildMI(*BB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); + return; + } + } emitCastOperation(BB, MI, Op, CI.getType(), DestReg); }