mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-30 04:56:49 +00:00
[X86][SSE][CostModel] Added full set of sitofp/uitofp costings for SSE2/AVX/AVX2/AVX512F.
Merged separate (but equivalent) SSE2/AVX512F tests. Removed codegen tests since these are already done better in test/CodeGen/X86. The actual cost values still need to be updated to match recent codegen improvements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240219 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Simon Pilgrim
parent
34fb635521
commit
1e71d7421a
@ -1,9 +1,20 @@
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; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
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; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE --check-prefix=SSE2 %s
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; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx -cost-model -analyze < %s | FileCheck --check-prefix=AVX --check-prefix=AVX1 %s
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; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx2 -cost-model -analyze < %s | FileCheck --check-prefix=AVX --check-prefix=AVX2 %s
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; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx512f -cost-model -analyze < %s | FileCheck --check-prefix=AVX512F %s
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define <2 x double> @sitofpv2i8v2double(<2 x i8> %a) {
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; SSE2: sitofpv2i8v2double
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; SSE2: cost of 20 {{.*}} sitofp
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;
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; AVX1: sitofpv2i8v2double
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; AVX1: cost of 4 {{.*}} sitofp
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;
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; AVX2: sitofpv2i8v2double
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; AVX2: cost of 4 {{.*}} sitofp
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;
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; AVX512F: sitofpv2i8v2double
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; AVX512F: cost of 4 {{.*}} sitofp
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%1 = sitofp <2 x i8> %a to <2 x double>
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ret <2 x double> %1
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}
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@ -11,6 +22,15 @@ define <2 x double> @sitofpv2i8v2double(<2 x i8> %a) {
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define <4 x double> @sitofpv4i8v4double(<4 x i8> %a) {
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; SSE2: sitofpv4i8v4double
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; SSE2: cost of 40 {{.*}} sitofp
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;
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; AVX1: sitofpv4i8v4double
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; AVX1: cost of 3 {{.*}} sitofp
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;
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; AVX2: sitofpv4i8v4double
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; AVX2: cost of 3 {{.*}} sitofp
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;
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; AVX512F: sitofpv4i8v4double
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; AVX512F: cost of 3 {{.*}} sitofp
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%1 = sitofp <4 x i8> %a to <4 x double>
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ret <4 x double> %1
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}
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@ -18,13 +38,31 @@ define <4 x double> @sitofpv4i8v4double(<4 x i8> %a) {
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define <8 x double> @sitofpv8i8v8double(<8 x i8> %a) {
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; SSE2: sitofpv8i8v8double
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; SSE2: cost of 80 {{.*}} sitofp
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%1 = sitofp <8 x i8> %a to <8 x double>
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;
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; AVX1: sitofpv8i8v8double
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; AVX1: cost of 20 {{.*}} sitofp
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;
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; AVX2: sitofpv8i8v8double
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; AVX2: cost of 20 {{.*}} sitofp
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;
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; AVX512F: sitofpv8i8v8double
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; AVX512F: cost of 2 {{.*}} sitofp
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%1 = sitofp <8 x i8> %a to <8 x double>
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i8v16double(<16 x i8> %a) {
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; SSE2: sitofpv16i8v16double
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; SSE2: cost of 160 {{.*}} sitofp
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;
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; AVX1: sitofpv16i8v16double
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; AVX1: cost of 40 {{.*}} sitofp
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;
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; AVX2: sitofpv16i8v16double
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; AVX2: cost of 40 {{.*}} sitofp
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;
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; AVX512F: sitofpv16i8v16double
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; AVX512F: cost of 44 {{.*}} sitofp
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%1 = sitofp <16 x i8> %a to <16 x double>
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ret <16 x double> %1
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}
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@ -32,6 +70,15 @@ define <16 x double> @sitofpv16i8v16double(<16 x i8> %a) {
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define <32 x double> @sitofpv32i8v32double(<32 x i8> %a) {
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; SSE2: sitofpv32i8v32double
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; SSE2: cost of 320 {{.*}} sitofp
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;
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; AVX1: sitofpv32i8v32double
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; AVX1: cost of 80 {{.*}} sitofp
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;
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; AVX2: sitofpv32i8v32double
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; AVX2: cost of 80 {{.*}} sitofp
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;
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; AVX512F: sitofpv32i8v32double
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; AVX512F: cost of 88 {{.*}} sitofp
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%1 = sitofp <32 x i8> %a to <32 x double>
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ret <32 x double> %1
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}
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@ -39,6 +86,15 @@ define <32 x double> @sitofpv32i8v32double(<32 x i8> %a) {
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define <2 x double> @sitofpv2i16v2double(<2 x i16> %a) {
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; SSE2: sitofpv2i16v2double
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; SSE2: cost of 20 {{.*}} sitofp
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;
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; AVX1: sitofpv2i16v2double
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; AVX1: cost of 4 {{.*}} sitofp
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;
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; AVX2: sitofpv2i16v2double
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; AVX2: cost of 4 {{.*}} sitofp
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;
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; AVX512F: sitofpv2i16v2double
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; AVX512F: cost of 4 {{.*}} sitofp
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%1 = sitofp <2 x i16> %a to <2 x double>
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ret <2 x double> %1
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}
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@ -46,6 +102,15 @@ define <2 x double> @sitofpv2i16v2double(<2 x i16> %a) {
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define <4 x double> @sitofpv4i16v4double(<4 x i16> %a) {
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; SSE2: sitofpv4i16v4double
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; SSE2: cost of 40 {{.*}} sitofp
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;
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; AVX1: sitofpv4i16v4double
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; AVX1: cost of 3 {{.*}} sitofp
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;
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; AVX2: sitofpv4i16v4double
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; AVX2: cost of 3 {{.*}} sitofp
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;
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; AVX512F: sitofpv4i16v4double
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; AVX512F: cost of 3 {{.*}} sitofp
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%1 = sitofp <4 x i16> %a to <4 x double>
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ret <4 x double> %1
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}
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@ -53,6 +118,15 @@ define <4 x double> @sitofpv4i16v4double(<4 x i16> %a) {
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define <8 x double> @sitofpv8i16v8double(<8 x i16> %a) {
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; SSE2: sitofpv8i16v8double
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; SSE2: cost of 80 {{.*}} sitofp
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;
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; AVX1: sitofpv8i16v8double
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; AVX1: cost of 20 {{.*}} sitofp
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;
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; AVX2: sitofpv8i16v8double
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; AVX2: cost of 20 {{.*}} sitofp
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;
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; AVX512F: sitofpv8i16v8double
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; AVX512F: cost of 2 {{.*}} sitofp
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%1 = sitofp <8 x i16> %a to <8 x double>
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ret <8 x double> %1
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}
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@ -60,6 +134,15 @@ define <8 x double> @sitofpv8i16v8double(<8 x i16> %a) {
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define <16 x double> @sitofpv16i16v16double(<16 x i16> %a) {
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; SSE2: sitofpv16i16v16double
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; SSE2: cost of 160 {{.*}} sitofp
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;
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; AVX1: sitofpv16i16v16double
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; AVX1: cost of 40 {{.*}} sitofp
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;
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; AVX2: sitofpv16i16v16double
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; AVX2: cost of 40 {{.*}} sitofp
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;
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; AVX512F: sitofpv16i16v16double
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; AVX512F: cost of 44 {{.*}} sitofp
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%1 = sitofp <16 x i16> %a to <16 x double>
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ret <16 x double> %1
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}
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@ -67,6 +150,15 @@ define <16 x double> @sitofpv16i16v16double(<16 x i16> %a) {
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define <32 x double> @sitofpv32i16v32double(<32 x i16> %a) {
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; SSE2: sitofpv32i16v32double
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; SSE2: cost of 320 {{.*}} sitofp
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;
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; AVX1: sitofpv32i16v32double
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; AVX1: cost of 80 {{.*}} sitofp
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;
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; AVX2: sitofpv32i16v32double
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; AVX2: cost of 80 {{.*}} sitofp
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;
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; AVX512F: sitofpv32i16v32double
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; AVX512F: cost of 88 {{.*}} sitofp
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%1 = sitofp <32 x i16> %a to <32 x double>
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ret <32 x double> %1
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}
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@ -74,6 +166,15 @@ define <32 x double> @sitofpv32i16v32double(<32 x i16> %a) {
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define <2 x double> @sitofpv2i32v2double(<2 x i32> %a) {
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; SSE2: sitofpv2i32v2double
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; SSE2: cost of 20 {{.*}} sitofp
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;
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; AVX1: sitofpv2i32v2double
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; AVX1: cost of 4 {{.*}} sitofp
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;
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; AVX2: sitofpv2i32v2double
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; AVX2: cost of 4 {{.*}} sitofp
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;
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; AVX512F: sitofpv2i32v2double
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; AVX512F: cost of 4 {{.*}} sitofp
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%1 = sitofp <2 x i32> %a to <2 x double>
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ret <2 x double> %1
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}
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@ -81,6 +182,15 @@ define <2 x double> @sitofpv2i32v2double(<2 x i32> %a) {
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define <4 x double> @sitofpv4i32v4double(<4 x i32> %a) {
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; SSE2: sitofpv4i32v4double
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; SSE2: cost of 40 {{.*}} sitofp
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;
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; AVX1: sitofpv4i32v4double
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; AVX1: cost of 1 {{.*}} sitofp
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;
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; AVX2: sitofpv4i32v4double
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; AVX2: cost of 1 {{.*}} sitofp
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;
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; AVX512F: sitofpv4i32v4double
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; AVX512F: cost of 1 {{.*}} sitofp
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%1 = sitofp <4 x i32> %a to <4 x double>
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ret <4 x double> %1
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}
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@ -88,6 +198,15 @@ define <4 x double> @sitofpv4i32v4double(<4 x i32> %a) {
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define <8 x double> @sitofpv8i32v8double(<8 x i32> %a) {
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; SSE2: sitofpv8i32v8double
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; SSE2: cost of 80 {{.*}} sitofp
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;
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; AVX1: sitofpv8i32v8double
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; AVX1: cost of 20 {{.*}} sitofp
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;
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; AVX2: sitofpv8i32v8double
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; AVX2: cost of 20 {{.*}} sitofp
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;
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; AVX512F: sitofpv8i32v8double
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; AVX512F: cost of 1 {{.*}} sitofp
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%1 = sitofp <8 x i32> %a to <8 x double>
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ret <8 x double> %1
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}
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@ -95,6 +214,15 @@ define <8 x double> @sitofpv8i32v8double(<8 x i32> %a) {
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define <16 x double> @sitofpv16i32v16double(<16 x i32> %a) {
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; SSE2: sitofpv16i32v16double
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; SSE2: cost of 160 {{.*}} sitofp
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;
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; AVX1: sitofpv16i32v16double
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; AVX1: cost of 40 {{.*}} sitofp
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;
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; AVX2: sitofpv16i32v16double
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; AVX2: cost of 40 {{.*}} sitofp
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;
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; AVX512F: sitofpv16i32v16double
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; AVX512F: cost of 44 {{.*}} sitofp
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%1 = sitofp <16 x i32> %a to <16 x double>
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ret <16 x double> %1
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}
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@ -102,6 +230,15 @@ define <16 x double> @sitofpv16i32v16double(<16 x i32> %a) {
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define <32 x double> @sitofpv32i32v32double(<32 x i32> %a) {
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; SSE2: sitofpv32i32v32double
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; SSE2: cost of 320 {{.*}} sitofp
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;
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; AVX1: sitofpv32i32v32double
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; AVX1: cost of 80 {{.*}} sitofp
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;
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; AVX2: sitofpv32i32v32double
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; AVX2: cost of 80 {{.*}} sitofp
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;
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; AVX512F: sitofpv32i32v32double
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; AVX512F: cost of 88 {{.*}} sitofp
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%1 = sitofp <32 x i32> %a to <32 x double>
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ret <32 x double> %1
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}
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@ -109,6 +246,15 @@ define <32 x double> @sitofpv32i32v32double(<32 x i32> %a) {
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define <2 x double> @sitofpv2i64v2double(<2 x i64> %a) {
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; SSE2: sitofpv2i64v2double
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; SSE2: cost of 20 {{.*}} sitofp
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;
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; AVX1: sitofpv2i64v2double
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; AVX1: cost of 4 {{.*}} sitofp
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;
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; AVX2: sitofpv2i64v2double
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; AVX2: cost of 4 {{.*}} sitofp
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;
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; AVX512F: sitofpv2i64v2double
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; AVX512F: cost of 4 {{.*}} sitofp
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%1 = sitofp <2 x i64> %a to <2 x double>
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ret <2 x double> %1
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}
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@ -116,20 +262,47 @@ define <2 x double> @sitofpv2i64v2double(<2 x i64> %a) {
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define <4 x double> @sitofpv4i64v4double(<4 x i64> %a) {
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; SSE2: sitofpv4i64v4double
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; SSE2: cost of 40 {{.*}} sitofp
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;
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; AVX1: sitofpv4i64v4double
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; AVX1: cost of 10 {{.*}} sitofp
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;
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; AVX2: sitofpv4i64v4double
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; AVX2: cost of 10 {{.*}} sitofp
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;
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; AVX512F: sitofpv4i64v4double
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; AVX512F: cost of 10 {{.*}} sitofp
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%1 = sitofp <4 x i64> %a to <4 x double>
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ret <4 x double> %1
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}
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define <8 x double> @sitofpv8i64v8double(<8 x i64> %a) {
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%1 = sitofp <8 x i64> %a to <8 x double>
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; SSE2: sitofpv8i64v8double
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; SSE2: cost of 80 {{.*}} sitofp
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;
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; AVX1: sitofpv8i64v8double
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; AVX1: cost of 20 {{.*}} sitofp
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;
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; AVX2: sitofpv8i64v8double
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; AVX2: cost of 20 {{.*}} sitofp
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;
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; AVX512F: sitofpv8i64v8double
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; AVX512F: cost of 22 {{.*}} sitofp
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%1 = sitofp <8 x i64> %a to <8 x double>
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i64v16double(<16 x i64> %a) {
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; SSE2: sitofpv16i64v16double
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; SSE2: cost of 160 {{.*}} sitofp
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;
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; AVX1: sitofpv16i64v16double
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; AVX1: cost of 40 {{.*}} sitofp
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;
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; AVX2: sitofpv16i64v16double
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; AVX2: cost of 40 {{.*}} sitofp
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;
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; AVX512F: sitofpv16i64v16double
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; AVX512F: cost of 44 {{.*}} sitofp
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%1 = sitofp <16 x i64> %a to <16 x double>
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ret <16 x double> %1
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}
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@ -137,6 +310,15 @@ define <16 x double> @sitofpv16i64v16double(<16 x i64> %a) {
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define <32 x double> @sitofpv32i64v32double(<32 x i64> %a) {
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; SSE2: sitofpv32i64v32double
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; SSE2: cost of 320 {{.*}} sitofp
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;
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; AVX1: sitofpv32i64v32double
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; AVX1: cost of 80 {{.*}} sitofp
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;
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; AVX2: sitofpv32i64v32double
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; AVX2: cost of 80 {{.*}} sitofp
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;
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; AVX512F: sitofpv32i64v32double
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; AVX512F: cost of 88 {{.*}} sitofp
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%1 = sitofp <32 x i64> %a to <32 x double>
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ret <32 x double> %1
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}
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@ -144,6 +326,15 @@ define <32 x double> @sitofpv32i64v32double(<32 x i64> %a) {
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define <2 x float> @sitofpv2i8v2float(<2 x i8> %a) {
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; SSE2: sitofpv2i8v2float
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; SSE2: cost of 15 {{.*}} sitofp
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;
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; AVX1: sitofpv2i8v2float
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; AVX1: cost of 4 {{.*}} sitofp
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;
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; AVX2: sitofpv2i8v2float
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; AVX2: cost of 4 {{.*}} sitofp
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;
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; AVX512F: sitofpv2i8v2float
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; AVX512F: cost of 4 {{.*}} sitofp
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%1 = sitofp <2 x i8> %a to <2 x float>
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ret <2 x float> %1
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}
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@ -151,6 +342,15 @@ define <2 x float> @sitofpv2i8v2float(<2 x i8> %a) {
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define <4 x float> @sitofpv4i8v4float(<4 x i8> %a) {
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; SSE2: sitofpv4i8v4float
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; SSE2: cost of 15 {{.*}} sitofp
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;
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; AVX1: sitofpv4i8v4float
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; AVX1: cost of 3 {{.*}} sitofp
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;
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; AVX2: sitofpv4i8v4float
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; AVX2: cost of 3 {{.*}} sitofp
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;
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; AVX512F: sitofpv4i8v4float
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; AVX512F: cost of 3 {{.*}} sitofp
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%1 = sitofp <4 x i8> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -158,6 +358,15 @@ define <4 x float> @sitofpv4i8v4float(<4 x i8> %a) {
|
||||
define <8 x float> @sitofpv8i8v8float(<8 x i8> %a) {
|
||||
; SSE2: sitofpv8i8v8float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv8i8v8float
|
||||
; AVX1: cost of 8 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv8i8v8float
|
||||
; AVX2: cost of 8 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv8i8v8float
|
||||
; AVX512F: cost of 8 {{.*}} sitofp
|
||||
%1 = sitofp <8 x i8> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -165,6 +374,15 @@ define <8 x float> @sitofpv8i8v8float(<8 x i8> %a) {
|
||||
define <16 x float> @sitofpv16i8v16float(<16 x i8> %a) {
|
||||
; SSE2: sitofpv16i8v16float
|
||||
; SSE2: cost of 8 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv16i8v16float
|
||||
; AVX1: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv16i8v16float
|
||||
; AVX2: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv16i8v16float
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
%1 = sitofp <16 x i8> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -172,6 +390,15 @@ define <16 x float> @sitofpv16i8v16float(<16 x i8> %a) {
|
||||
define <32 x float> @sitofpv32i8v32float(<32 x i8> %a) {
|
||||
; SSE2: sitofpv32i8v32float
|
||||
; SSE2: cost of 16 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv32i8v32float
|
||||
; AVX1: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv32i8v32float
|
||||
; AVX2: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv32i8v32float
|
||||
; AVX512F: cost of 92 {{.*}} sitofp
|
||||
%1 = sitofp <32 x i8> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -179,6 +406,15 @@ define <32 x float> @sitofpv32i8v32float(<32 x i8> %a) {
|
||||
define <2 x float> @sitofpv2i16v2float(<2 x i16> %a) {
|
||||
; SSE2: sitofpv2i16v2float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv2i16v2float
|
||||
; AVX1: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv2i16v2float
|
||||
; AVX2: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv2i16v2float
|
||||
; AVX512F: cost of 4 {{.*}} sitofp
|
||||
%1 = sitofp <2 x i16> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -186,6 +422,15 @@ define <2 x float> @sitofpv2i16v2float(<2 x i16> %a) {
|
||||
define <4 x float> @sitofpv4i16v4float(<4 x i16> %a) {
|
||||
; SSE2: sitofpv4i16v4float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv4i16v4float
|
||||
; AVX1: cost of 3 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv4i16v4float
|
||||
; AVX2: cost of 3 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv4i16v4float
|
||||
; AVX512F: cost of 3 {{.*}} sitofp
|
||||
%1 = sitofp <4 x i16> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -193,6 +438,15 @@ define <4 x float> @sitofpv4i16v4float(<4 x i16> %a) {
|
||||
define <8 x float> @sitofpv8i16v8float(<8 x i16> %a) {
|
||||
; SSE2: sitofpv8i16v8float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv8i16v8float
|
||||
; AVX1: cost of 5 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv8i16v8float
|
||||
; AVX2: cost of 5 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv8i16v8float
|
||||
; AVX512F: cost of 5 {{.*}} sitofp
|
||||
%1 = sitofp <8 x i16> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -200,6 +454,15 @@ define <8 x float> @sitofpv8i16v8float(<8 x i16> %a) {
|
||||
define <16 x float> @sitofpv16i16v16float(<16 x i16> %a) {
|
||||
; SSE2: sitofpv16i16v16float
|
||||
; SSE2: cost of 30 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv16i16v16float
|
||||
; AVX1: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv16i16v16float
|
||||
; AVX2: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv16i16v16float
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
%1 = sitofp <16 x i16> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -207,6 +470,15 @@ define <16 x float> @sitofpv16i16v16float(<16 x i16> %a) {
|
||||
define <32 x float> @sitofpv32i16v32float(<32 x i16> %a) {
|
||||
; SSE2: sitofpv32i16v32float
|
||||
; SSE2: cost of 60 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv32i16v32float
|
||||
; AVX1: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv32i16v32float
|
||||
; AVX2: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv32i16v32float
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
%1 = sitofp <32 x i16> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -214,6 +486,15 @@ define <32 x float> @sitofpv32i16v32float(<32 x i16> %a) {
|
||||
define <2 x float> @sitofpv2i32v2float(<2 x i32> %a) {
|
||||
; SSE2: sitofpv2i32v2float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv2i32v2float
|
||||
; AVX1: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv2i32v2float
|
||||
; AVX2: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv2i32v2float
|
||||
; AVX512F: cost of 4 {{.*}} sitofp
|
||||
%1 = sitofp <2 x i32> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -221,6 +502,15 @@ define <2 x float> @sitofpv2i32v2float(<2 x i32> %a) {
|
||||
define <4 x float> @sitofpv4i32v4float(<4 x i32> %a) {
|
||||
; SSE2: sitofpv4i32v4float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv4i32v4float
|
||||
; AVX1: cost of 1 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv4i32v4float
|
||||
; AVX2: cost of 1 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv4i32v4float
|
||||
; AVX512F: cost of 1 {{.*}} sitofp
|
||||
%1 = sitofp <4 x i32> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -228,6 +518,15 @@ define <4 x float> @sitofpv4i32v4float(<4 x i32> %a) {
|
||||
define <8 x float> @sitofpv8i32v8float(<8 x i32> %a) {
|
||||
; SSE2: sitofpv8i32v8float
|
||||
; SSE2: cost of 30 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv8i32v8float
|
||||
; AVX1: cost of 1 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv8i32v8float
|
||||
; AVX2: cost of 1 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv8i32v8float
|
||||
; AVX512F: cost of 1 {{.*}} sitofp
|
||||
%1 = sitofp <8 x i32> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -235,6 +534,15 @@ define <8 x float> @sitofpv8i32v8float(<8 x i32> %a) {
|
||||
define <16 x float> @sitofpv16i32v16float(<16 x i32> %a) {
|
||||
; SSE2: sitofpv16i32v16float
|
||||
; SSE2: cost of 60 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv16i32v16float
|
||||
; AVX1: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv16i32v16float
|
||||
; AVX2: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv16i32v16float
|
||||
; AVX512F: cost of 1 {{.*}} sitofp
|
||||
%1 = sitofp <16 x i32> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -242,6 +550,15 @@ define <16 x float> @sitofpv16i32v16float(<16 x i32> %a) {
|
||||
define <32 x float> @sitofpv32i32v32float(<32 x i32> %a) {
|
||||
; SSE2: sitofpv32i32v32float
|
||||
; SSE2: cost of 120 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv32i32v32float
|
||||
; AVX1: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv32i32v32float
|
||||
; AVX2: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv32i32v32float
|
||||
; AVX512F: cost of 1 {{.*}} sitofp
|
||||
%1 = sitofp <32 x i32> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -249,6 +566,15 @@ define <32 x float> @sitofpv32i32v32float(<32 x i32> %a) {
|
||||
define <2 x float> @sitofpv2i64v2float(<2 x i64> %a) {
|
||||
; SSE2: sitofpv2i64v2float
|
||||
; SSE2: cost of 15 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv2i64v2float
|
||||
; AVX1: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv2i64v2float
|
||||
; AVX2: cost of 4 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv2i64v2float
|
||||
; AVX512F: cost of 4 {{.*}} sitofp
|
||||
%1 = sitofp <2 x i64> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -256,6 +582,15 @@ define <2 x float> @sitofpv2i64v2float(<2 x i64> %a) {
|
||||
define <4 x float> @sitofpv4i64v4float(<4 x i64> %a) {
|
||||
; SSE2: sitofpv4i64v4float
|
||||
; SSE2: cost of 30 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv4i64v4float
|
||||
; AVX1: cost of 10 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv4i64v4float
|
||||
; AVX2: cost of 10 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv4i64v4float
|
||||
; AVX512F: cost of 10 {{.*}} sitofp
|
||||
%1 = sitofp <4 x i64> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -263,6 +598,15 @@ define <4 x float> @sitofpv4i64v4float(<4 x i64> %a) {
|
||||
define <8 x float> @sitofpv8i64v8float(<8 x i64> %a) {
|
||||
; SSE2: sitofpv8i64v8float
|
||||
; SSE2: cost of 60 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv8i64v8float
|
||||
; AVX1: cost of 22 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv8i64v8float
|
||||
; AVX2: cost of 22 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv8i64v8float
|
||||
; AVX512F: cost of 22 {{.*}} sitofp
|
||||
%1 = sitofp <8 x i64> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -270,6 +614,15 @@ define <8 x float> @sitofpv8i64v8float(<8 x i64> %a) {
|
||||
define <16 x float> @sitofpv16i64v16float(<16 x i64> %a) {
|
||||
; SSE2: sitofpv16i64v16float
|
||||
; SSE2: cost of 120 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv16i64v16float
|
||||
; AVX1: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv16i64v16float
|
||||
; AVX2: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv16i64v16float
|
||||
; AVX512F: cost of 46 {{.*}} sitofp
|
||||
%1 = sitofp <16 x i64> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -277,49 +630,48 @@ define <16 x float> @sitofpv16i64v16float(<16 x i64> %a) {
|
||||
define <32 x float> @sitofpv32i64v32float(<32 x i64> %a) {
|
||||
; SSE2: sitofpv32i64v32float
|
||||
; SSE2: cost of 240 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv32i64v32float
|
||||
; AVX1: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv32i64v32float
|
||||
; AVX2: cost of 88 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv32i64v32float
|
||||
; AVX512F: cost of 92 {{.*}} sitofp
|
||||
%1 = sitofp <32 x i64> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
|
||||
; AVX512F-LABEL: sitofp_16i8_float
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
define <16 x float> @sitofp_16i8_float(<16 x i8> %a) {
|
||||
%1 = sitofp <16 x i8> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
|
||||
define <16 x float> @sitofp_16i16_float(<16 x i16> %a) {
|
||||
; AVX512F-LABEL: sitofp_16i16_float
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
%1 = sitofp <16 x i16> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
|
||||
; AVX512F-LABEL: sitofp_8i8_double
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
define <8 x double> @sitofp_8i8_double(<8 x i8> %a) {
|
||||
%1 = sitofp <8 x i8> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
|
||||
; AVX512F-LABEL: sitofp_8i16_double
|
||||
; AVX512F: cost of 2 {{.*}} sitofp
|
||||
define <8 x double> @sitofp_8i16_double(<8 x i16> %a) {
|
||||
%1 = sitofp <8 x i16> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
|
||||
; AVX512F-LABEL: sitofp_8i1_double
|
||||
; AVX512F: cost of 4 {{.*}} sitofp
|
||||
define <8 x double> @sitofp_8i1_double(<8 x double> %a) {
|
||||
define <8 x double> @sitofpv8i1v8double(<8 x double> %a) {
|
||||
; SSE2: sitofpv8i1v8double
|
||||
; SSE2: cost of 80 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv8i1v8double
|
||||
; AVX1: cost of 20 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv8i1v8double
|
||||
; AVX2: cost of 20 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv8i1v8double
|
||||
; AVX512F: cost of 4 {{.*}} sitofp
|
||||
%cmpres = fcmp ogt <8 x double> %a, zeroinitializer
|
||||
%1 = sitofp <8 x i1> %cmpres to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
|
||||
; AVX512F-LABEL: sitofp_16i1_float
|
||||
; AVX512F: cost of 3 {{.*}} sitofp
|
||||
define <16 x float> @sitofp_16i1_float(<16 x float> %a) {
|
||||
define <16 x float> @sitofpv16i1v16float(<16 x float> %a) {
|
||||
; SSE2: sitofpv16i1v16float
|
||||
; SSE2: cost of 8 {{.*}} sitofp
|
||||
;
|
||||
; AVX1: sitofpv16i1v16float
|
||||
; AVX1: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX2: sitofpv16i1v16float
|
||||
; AVX2: cost of 44 {{.*}} sitofp
|
||||
;
|
||||
; AVX512F: sitofpv16i1v16float
|
||||
; AVX512F: cost of 3 {{.*}} sitofp
|
||||
%cmpres = fcmp ogt <16 x float> %a, zeroinitializer
|
||||
%1 = sitofp <16 x i1> %cmpres to <16 x float>
|
||||
ret <16 x float> %1
|
||||
|
||||
@ -1,18 +1,20 @@
|
||||
; RUN: llc -mtriple=x86_64-apple-darwin -mattr=+sse2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
|
||||
|
||||
; In X86TargetTransformInfo::getCastInstrCost we have code that depends on
|
||||
; getSimpleVT on a value type. On AVX2 we execute this code. Make sure we exit
|
||||
; early if the type is not a simple value type before we call this function.
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx2 -cost-model -analyze < %s
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE --check-prefix=SSE2 %s
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx -cost-model -analyze < %s | FileCheck --check-prefix=AVX --check-prefix=AVX1 %s
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx2 -cost-model -analyze < %s | FileCheck --check-prefix=AVX --check-prefix=AVX2 %s
|
||||
; RUN: opt -mtriple=x86_64-apple-darwin -mattr=+avx512f -cost-model -analyze < %s | FileCheck --check-prefix=AVX512F %s
|
||||
|
||||
define <2 x double> @uitofpv2i8v2double(<2 x i8> %a) {
|
||||
; SSE2: uitofpv2i8v2double
|
||||
; SSE2: cost of 20 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv2i8v2double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv2i8v2double
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i8v2double
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i8v2double
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i8> %a to <2 x double>
|
||||
ret <2 x double> %1
|
||||
}
|
||||
@ -20,10 +22,15 @@ define <2 x double> @uitofpv2i8v2double(<2 x i8> %a) {
|
||||
define <4 x double> @uitofpv4i8v4double(<4 x i8> %a) {
|
||||
; SSE2: uitofpv4i8v4double
|
||||
; SSE2: cost of 40 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv4i8v4double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv4i8v4double
|
||||
; AVX1: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i8v4double
|
||||
; AVX2: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i8v4double
|
||||
; AVX512F: cost of 2 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i8> %a to <4 x double>
|
||||
ret <4 x double> %1
|
||||
}
|
||||
@ -31,21 +38,31 @@ define <4 x double> @uitofpv4i8v4double(<4 x i8> %a) {
|
||||
define <8 x double> @uitofpv8i8v8double(<8 x i8> %a) {
|
||||
; SSE2: uitofpv8i8v8double
|
||||
; SSE2: cost of 80 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv8i8v8double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
%1 = uitofp <8 x i8> %a to <8 x double>
|
||||
;
|
||||
; AVX1: uitofpv8i8v8double
|
||||
; AVX1: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i8v8double
|
||||
; AVX2: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i8v8double
|
||||
; AVX512F: cost of 22 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i8> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
|
||||
define <16 x double> @uitofpv16i8v16double(<16 x i8> %a) {
|
||||
; SSE2: uitofpv16i8v16double
|
||||
; SSE2: cost of 160 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv16i8v16double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv16i8v16double
|
||||
; AVX1: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i8v16double
|
||||
; AVX2: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i8v16double
|
||||
; AVX512F: cost of 44 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i8> %a to <16 x double>
|
||||
ret <16 x double> %1
|
||||
}
|
||||
@ -53,10 +70,15 @@ define <16 x double> @uitofpv16i8v16double(<16 x i8> %a) {
|
||||
define <32 x double> @uitofpv32i8v32double(<32 x i8> %a) {
|
||||
; SSE2: uitofpv32i8v32double
|
||||
; SSE2: cost of 320 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv32i8v32double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv32i8v32double
|
||||
; AVX1: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i8v32double
|
||||
; AVX2: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i8v32double
|
||||
; AVX512F: cost of 88 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i8> %a to <32 x double>
|
||||
ret <32 x double> %1
|
||||
}
|
||||
@ -64,10 +86,15 @@ define <32 x double> @uitofpv32i8v32double(<32 x i8> %a) {
|
||||
define <2 x double> @uitofpv2i16v2double(<2 x i16> %a) {
|
||||
; SSE2: uitofpv2i16v2double
|
||||
; SSE2: cost of 20 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv2i16v2double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv2i16v2double
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i16v2double
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i16v2double
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i16> %a to <2 x double>
|
||||
ret <2 x double> %1
|
||||
}
|
||||
@ -75,10 +102,15 @@ define <2 x double> @uitofpv2i16v2double(<2 x i16> %a) {
|
||||
define <4 x double> @uitofpv4i16v4double(<4 x i16> %a) {
|
||||
; SSE2: uitofpv4i16v4double
|
||||
; SSE2: cost of 40 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv4i16v4double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv4i16v4double
|
||||
; AVX1: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i16v4double
|
||||
; AVX2: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i16v4double
|
||||
; AVX512F: cost of 2 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i16> %a to <4 x double>
|
||||
ret <4 x double> %1
|
||||
}
|
||||
@ -86,10 +118,15 @@ define <4 x double> @uitofpv4i16v4double(<4 x i16> %a) {
|
||||
define <8 x double> @uitofpv8i16v8double(<8 x i16> %a) {
|
||||
; SSE2: uitofpv8i16v8double
|
||||
; SSE2: cost of 80 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv8i16v8double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv8i16v8double
|
||||
; AVX1: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i16v8double
|
||||
; AVX2: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i16v8double
|
||||
; AVX512F: cost of 22 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i16> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
@ -97,10 +134,15 @@ define <8 x double> @uitofpv8i16v8double(<8 x i16> %a) {
|
||||
define <16 x double> @uitofpv16i16v16double(<16 x i16> %a) {
|
||||
; SSE2: uitofpv16i16v16double
|
||||
; SSE2: cost of 160 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv16i16v16double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv16i16v16double
|
||||
; AVX1: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i16v16double
|
||||
; AVX2: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i16v16double
|
||||
; AVX512F: cost of 44 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i16> %a to <16 x double>
|
||||
ret <16 x double> %1
|
||||
}
|
||||
@ -108,10 +150,15 @@ define <16 x double> @uitofpv16i16v16double(<16 x i16> %a) {
|
||||
define <32 x double> @uitofpv32i16v32double(<32 x i16> %a) {
|
||||
; SSE2: uitofpv32i16v32double
|
||||
; SSE2: cost of 320 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv32i16v32double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv32i16v32double
|
||||
; AVX1: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i16v32double
|
||||
; AVX2: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i16v32double
|
||||
; AVX512F: cost of 88 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i16> %a to <32 x double>
|
||||
ret <32 x double> %1
|
||||
}
|
||||
@ -119,10 +166,15 @@ define <32 x double> @uitofpv32i16v32double(<32 x i16> %a) {
|
||||
define <2 x double> @uitofpv2i32v2double(<2 x i32> %a) {
|
||||
; SSE2: uitofpv2i32v2double
|
||||
; SSE2: cost of 20 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv2i32v2double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv2i32v2double
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i32v2double
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i32v2double
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i32> %a to <2 x double>
|
||||
ret <2 x double> %1
|
||||
}
|
||||
@ -130,10 +182,15 @@ define <2 x double> @uitofpv2i32v2double(<2 x i32> %a) {
|
||||
define <4 x double> @uitofpv4i32v4double(<4 x i32> %a) {
|
||||
; SSE2: uitofpv4i32v4double
|
||||
; SSE2: cost of 40 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv4i32v4double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv4i32v4double
|
||||
; AVX1: cost of 6 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i32v4double
|
||||
; AVX2: cost of 6 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i32v4double
|
||||
; AVX512F: cost of 6 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i32> %a to <4 x double>
|
||||
ret <4 x double> %1
|
||||
}
|
||||
@ -141,10 +198,15 @@ define <4 x double> @uitofpv4i32v4double(<4 x i32> %a) {
|
||||
define <8 x double> @uitofpv8i32v8double(<8 x i32> %a) {
|
||||
; SSE2: uitofpv8i32v8double
|
||||
; SSE2: cost of 80 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv8i32v8double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv8i32v8double
|
||||
; AVX1: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i32v8double
|
||||
; AVX2: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i32v8double
|
||||
; AVX512F: cost of 22 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i32> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
@ -152,10 +214,15 @@ define <8 x double> @uitofpv8i32v8double(<8 x i32> %a) {
|
||||
define <16 x double> @uitofpv16i32v16double(<16 x i32> %a) {
|
||||
; SSE2: uitofpv16i32v16double
|
||||
; SSE2: cost of 160 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv16i32v16double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv16i32v16double
|
||||
; AVX1: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i32v16double
|
||||
; AVX2: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i32v16double
|
||||
; AVX512F: cost of 44 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i32> %a to <16 x double>
|
||||
ret <16 x double> %1
|
||||
}
|
||||
@ -163,10 +230,15 @@ define <16 x double> @uitofpv16i32v16double(<16 x i32> %a) {
|
||||
define <32 x double> @uitofpv32i32v32double(<32 x i32> %a) {
|
||||
; SSE2: uitofpv32i32v32double
|
||||
; SSE2: cost of 320 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv32i32v32double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv32i32v32double
|
||||
; AVX1: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i32v32double
|
||||
; AVX2: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i32v32double
|
||||
; AVX512F: cost of 88 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i32> %a to <32 x double>
|
||||
ret <32 x double> %1
|
||||
}
|
||||
@ -174,10 +246,15 @@ define <32 x double> @uitofpv32i32v32double(<32 x i32> %a) {
|
||||
define <2 x double> @uitofpv2i64v2double(<2 x i64> %a) {
|
||||
; SSE2: uitofpv2i64v2double
|
||||
; SSE2: cost of 20 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv2i64v2double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv2i64v2double
|
||||
; AVX1: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i64v2double
|
||||
; AVX2: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i64v2double
|
||||
; AVX512F: cost of 20 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i64> %a to <2 x double>
|
||||
ret <2 x double> %1
|
||||
}
|
||||
@ -185,32 +262,47 @@ define <2 x double> @uitofpv2i64v2double(<2 x i64> %a) {
|
||||
define <4 x double> @uitofpv4i64v4double(<4 x i64> %a) {
|
||||
; SSE2: uitofpv4i64v4double
|
||||
; SSE2: cost of 40 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv4i64v4double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv4i64v4double
|
||||
; AVX1: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i64v4double
|
||||
; AVX2: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i64v4double
|
||||
; AVX512F: cost of 40 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i64> %a to <4 x double>
|
||||
ret <4 x double> %1
|
||||
}
|
||||
|
||||
define <8 x double> @uitofpv8i64v8double(<8 x i64> %a) {
|
||||
%1 = uitofp <8 x i64> %a to <8 x double>
|
||||
; SSE2: uitofpv8i64v8double
|
||||
; SSE2: cost of 80 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv8i64v8double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv8i64v8double
|
||||
; AVX1: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i64v8double
|
||||
; AVX2: cost of 20 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i64v8double
|
||||
; AVX512F: cost of 22 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i64> %a to <8 x double>
|
||||
ret <8 x double> %1
|
||||
}
|
||||
|
||||
define <16 x double> @uitofpv16i64v16double(<16 x i64> %a) {
|
||||
; SSE2: uitofpv16i64v16double
|
||||
; SSE2: cost of 160 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv16i64v16double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv16i64v16double
|
||||
; AVX1: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i64v16double
|
||||
; AVX2: cost of 40 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i64v16double
|
||||
; AVX512F: cost of 44 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i64> %a to <16 x double>
|
||||
ret <16 x double> %1
|
||||
}
|
||||
@ -218,10 +310,15 @@ define <16 x double> @uitofpv16i64v16double(<16 x i64> %a) {
|
||||
define <32 x double> @uitofpv32i64v32double(<32 x i64> %a) {
|
||||
; SSE2: uitofpv32i64v32double
|
||||
; SSE2: cost of 320 {{.*}} uitofp
|
||||
; SSE2-CODEGEN: uitofpv32i64v32double
|
||||
; SSE2-CODEGEN: movapd LCPI
|
||||
; SSE2-CODEGEN: subpd
|
||||
; SSE2-CODEGEN: addpd
|
||||
;
|
||||
; AVX1: uitofpv32i64v32double
|
||||
; AVX1: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i64v32double
|
||||
; AVX2: cost of 80 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i64v32double
|
||||
; AVX512F: cost of 88 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i64> %a to <32 x double>
|
||||
ret <32 x double> %1
|
||||
}
|
||||
@ -229,6 +326,15 @@ define <32 x double> @uitofpv32i64v32double(<32 x i64> %a) {
|
||||
define <2 x float> @uitofpv2i8v2float(<2 x i8> %a) {
|
||||
; SSE2: uitofpv2i8v2float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv2i8v2float
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i8v2float
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i8v2float
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i8> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -236,6 +342,15 @@ define <2 x float> @uitofpv2i8v2float(<2 x i8> %a) {
|
||||
define <4 x float> @uitofpv4i8v4float(<4 x i8> %a) {
|
||||
; SSE2: uitofpv4i8v4float
|
||||
; SSE2: cost of 8 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv4i8v4float
|
||||
; AVX1: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i8v4float
|
||||
; AVX2: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i8v4float
|
||||
; AVX512F: cost of 2 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i8> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -243,6 +358,15 @@ define <4 x float> @uitofpv4i8v4float(<4 x i8> %a) {
|
||||
define <8 x float> @uitofpv8i8v8float(<8 x i8> %a) {
|
||||
; SSE2: uitofpv8i8v8float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv8i8v8float
|
||||
; AVX1: cost of 5 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i8v8float
|
||||
; AVX2: cost of 5 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i8v8float
|
||||
; AVX512F: cost of 5 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i8> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -250,6 +374,15 @@ define <8 x float> @uitofpv8i8v8float(<8 x i8> %a) {
|
||||
define <16 x float> @uitofpv16i8v16float(<16 x i8> %a) {
|
||||
; SSE2: uitofpv16i8v16float
|
||||
; SSE2: cost of 8 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv16i8v16float
|
||||
; AVX1: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i8v16float
|
||||
; AVX2: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i8v16float
|
||||
; AVX512F: cost of 46 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i8> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -257,6 +390,15 @@ define <16 x float> @uitofpv16i8v16float(<16 x i8> %a) {
|
||||
define <32 x float> @uitofpv32i8v32float(<32 x i8> %a) {
|
||||
; SSE2: uitofpv32i8v32float
|
||||
; SSE2: cost of 16 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv32i8v32float
|
||||
; AVX1: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i8v32float
|
||||
; AVX2: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i8v32float
|
||||
; AVX512F: cost of 92 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i8> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -264,6 +406,15 @@ define <32 x float> @uitofpv32i8v32float(<32 x i8> %a) {
|
||||
define <2 x float> @uitofpv2i16v2float(<2 x i16> %a) {
|
||||
; SSE2: uitofpv2i16v2float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv2i16v2float
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i16v2float
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i16v2float
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i16> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -271,6 +422,15 @@ define <2 x float> @uitofpv2i16v2float(<2 x i16> %a) {
|
||||
define <4 x float> @uitofpv4i16v4float(<4 x i16> %a) {
|
||||
; SSE2: uitofpv4i16v4float
|
||||
; SSE2: cost of 8 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv4i16v4float
|
||||
; AVX1: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i16v4float
|
||||
; AVX2: cost of 2 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i16v4float
|
||||
; AVX512F: cost of 2 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i16> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -278,6 +438,15 @@ define <4 x float> @uitofpv4i16v4float(<4 x i16> %a) {
|
||||
define <8 x float> @uitofpv8i16v8float(<8 x i16> %a) {
|
||||
; SSE2: uitofpv8i16v8float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv8i16v8float
|
||||
; AVX1: cost of 5 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i16v8float
|
||||
; AVX2: cost of 5 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i16v8float
|
||||
; AVX512F: cost of 5 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i16> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -285,6 +454,15 @@ define <8 x float> @uitofpv8i16v8float(<8 x i16> %a) {
|
||||
define <16 x float> @uitofpv16i16v16float(<16 x i16> %a) {
|
||||
; SSE2: uitofpv16i16v16float
|
||||
; SSE2: cost of 30 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv16i16v16float
|
||||
; AVX1: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i16v16float
|
||||
; AVX2: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i16v16float
|
||||
; AVX512F: cost of 46 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i16> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -292,6 +470,15 @@ define <16 x float> @uitofpv16i16v16float(<16 x i16> %a) {
|
||||
define <32 x float> @uitofpv32i16v32float(<32 x i16> %a) {
|
||||
; SSE2: uitofpv32i16v32float
|
||||
; SSE2: cost of 60 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv32i16v32float
|
||||
; AVX1: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i16v32float
|
||||
; AVX2: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i16v32float
|
||||
; AVX512F: cost of 92 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i16> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -299,6 +486,15 @@ define <32 x float> @uitofpv32i16v32float(<32 x i16> %a) {
|
||||
define <2 x float> @uitofpv2i32v2float(<2 x i32> %a) {
|
||||
; SSE2: uitofpv2i32v2float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv2i32v2float
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i32v2float
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i32v2float
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i32> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -306,6 +502,15 @@ define <2 x float> @uitofpv2i32v2float(<2 x i32> %a) {
|
||||
define <4 x float> @uitofpv4i32v4float(<4 x i32> %a) {
|
||||
; SSE2: uitofpv4i32v4float
|
||||
; SSE2: cost of 8 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv4i32v4float
|
||||
; AVX1: cost of 6 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i32v4float
|
||||
; AVX2: cost of 6 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i32v4float
|
||||
; AVX512F: cost of 6 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i32> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -313,6 +518,15 @@ define <4 x float> @uitofpv4i32v4float(<4 x i32> %a) {
|
||||
define <8 x float> @uitofpv8i32v8float(<8 x i32> %a) {
|
||||
; SSE2: uitofpv8i32v8float
|
||||
; SSE2: cost of 16 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv8i32v8float
|
||||
; AVX1: cost of 9 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i32v8float
|
||||
; AVX2: cost of 8 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i32v8float
|
||||
; AVX512F: cost of 8 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i32> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -320,6 +534,15 @@ define <8 x float> @uitofpv8i32v8float(<8 x i32> %a) {
|
||||
define <16 x float> @uitofpv16i32v16float(<16 x i32> %a) {
|
||||
; SSE2: uitofpv16i32v16float
|
||||
; SSE2: cost of 32 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv16i32v16float
|
||||
; AVX1: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i32v16float
|
||||
; AVX2: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i32v16float
|
||||
; AVX512F: cost of 46 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i32> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -327,6 +550,15 @@ define <16 x float> @uitofpv16i32v16float(<16 x i32> %a) {
|
||||
define <32 x float> @uitofpv32i32v32float(<32 x i32> %a) {
|
||||
; SSE2: uitofpv32i32v32float
|
||||
; SSE2: cost of 64 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv32i32v32float
|
||||
; AVX1: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i32v32float
|
||||
; AVX2: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i32v32float
|
||||
; AVX512F: cost of 92 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i32> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
@ -334,6 +566,15 @@ define <32 x float> @uitofpv32i32v32float(<32 x i32> %a) {
|
||||
define <2 x float> @uitofpv2i64v2float(<2 x i64> %a) {
|
||||
; SSE2: uitofpv2i64v2float
|
||||
; SSE2: cost of 15 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv2i64v2float
|
||||
; AVX1: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv2i64v2float
|
||||
; AVX2: cost of 4 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv2i64v2float
|
||||
; AVX512F: cost of 4 {{.*}} uitofp
|
||||
%1 = uitofp <2 x i64> %a to <2 x float>
|
||||
ret <2 x float> %1
|
||||
}
|
||||
@ -341,6 +582,15 @@ define <2 x float> @uitofpv2i64v2float(<2 x i64> %a) {
|
||||
define <4 x float> @uitofpv4i64v4float(<4 x i64> %a) {
|
||||
; SSE2: uitofpv4i64v4float
|
||||
; SSE2: cost of 30 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv4i64v4float
|
||||
; AVX1: cost of 10 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv4i64v4float
|
||||
; AVX2: cost of 10 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv4i64v4float
|
||||
; AVX512F: cost of 10 {{.*}} uitofp
|
||||
%1 = uitofp <4 x i64> %a to <4 x float>
|
||||
ret <4 x float> %1
|
||||
}
|
||||
@ -348,6 +598,15 @@ define <4 x float> @uitofpv4i64v4float(<4 x i64> %a) {
|
||||
define <8 x float> @uitofpv8i64v8float(<8 x i64> %a) {
|
||||
; SSE2: uitofpv8i64v8float
|
||||
; SSE2: cost of 60 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv8i64v8float
|
||||
; AVX1: cost of 22 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv8i64v8float
|
||||
; AVX2: cost of 22 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv8i64v8float
|
||||
; AVX512F: cost of 22 {{.*}} uitofp
|
||||
%1 = uitofp <8 x i64> %a to <8 x float>
|
||||
ret <8 x float> %1
|
||||
}
|
||||
@ -355,6 +614,15 @@ define <8 x float> @uitofpv8i64v8float(<8 x i64> %a) {
|
||||
define <16 x float> @uitofpv16i64v16float(<16 x i64> %a) {
|
||||
; SSE2: uitofpv16i64v16float
|
||||
; SSE2: cost of 120 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv16i64v16float
|
||||
; AVX1: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv16i64v16float
|
||||
; AVX2: cost of 44 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv16i64v16float
|
||||
; AVX512F: cost of 46 {{.*}} uitofp
|
||||
%1 = uitofp <16 x i64> %a to <16 x float>
|
||||
ret <16 x float> %1
|
||||
}
|
||||
@ -362,6 +630,15 @@ define <16 x float> @uitofpv16i64v16float(<16 x i64> %a) {
|
||||
define <32 x float> @uitofpv32i64v32float(<32 x i64> %a) {
|
||||
; SSE2: uitofpv32i64v32float
|
||||
; SSE2: cost of 240 {{.*}} uitofp
|
||||
;
|
||||
; AVX1: uitofpv32i64v32float
|
||||
; AVX1: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX2: uitofpv32i64v32float
|
||||
; AVX2: cost of 88 {{.*}} uitofp
|
||||
;
|
||||
; AVX512F: uitofpv32i64v32float
|
||||
; AVX512F: cost of 92 {{.*}} uitofp
|
||||
%1 = uitofp <32 x i64> %a to <32 x float>
|
||||
ret <32 x float> %1
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user