mirror of
https://github.com/c64scene-ar/llvm-6502.git
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ptx: add floating-point comparison to setp
Patched by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129847 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Che-Liang Chiou
parent
2a2dbd03a4
commit
1e93249199
@ -323,9 +323,9 @@ multiclass INT3ntnc<string opcstr, SDNode opnode> {
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[(set RRegu64:$d, (opnode imm:$a, RRegu64:$b))]>;
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}
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multiclass PTX_SETP<RegisterClass RC, string regclsname, Operand immcls,
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multiclass PTX_SETP_I<RegisterClass RC, string regclsname, Operand immcls,
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CondCode cmp, string cmpstr> {
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// TODO 1. support floating-point 2. support 5-operand format: p|q, a, b, c
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// TODO support 5-operand format: p|q, a, b, c
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def rr
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
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@ -387,6 +387,74 @@ multiclass PTX_SETP<RegisterClass RC, string regclsname, Operand immcls,
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[(set Preds:$p, (xor (setcc RC:$a, imm:$b, cmp), (not Preds:$c)))]>;
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}
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multiclass PTX_SETP_FP<RegisterClass RC, string regclsname,
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CondCode ucmp, CondCode ocmp, string cmpstr> {
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// TODO support 5-operand format: p|q, a, b, c
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def rr_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
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!strconcat("setp.", cmpstr, "u.", regclsname, "\t$p, $a, $b"),
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[(set Preds:$p, (setcc RC:$a, RC:$b, ucmp))]>;
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def rr_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b),
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!strconcat("setp.", cmpstr, ".", regclsname, "\t$p, $a, $b"),
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[(set Preds:$p, (setcc RC:$a, RC:$b, ocmp))]>;
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def rr_and_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.and.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (and (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
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def rr_and_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (and (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
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def rr_or_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.or.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (or (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
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def rr_or_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (or (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
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def rr_xor_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.xor.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ucmp), Preds:$c))]>;
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def rr_xor_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, $c"),
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[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ocmp), Preds:$c))]>;
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def rr_and_not_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.and.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (and (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
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def rr_and_not_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".and.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (and (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
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def rr_or_not_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.or.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (or (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
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def rr_or_not_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".or.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (or (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
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def rr_xor_not_r_u
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, "u.xor.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ucmp), (not Preds:$c)))]>;
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def rr_xor_not_r_o
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: InstPTX<(outs Preds:$p), (ins RC:$a, RC:$b, Preds:$c),
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!strconcat("setp.", cmpstr, ".xor.", regclsname, "\t$p, $a, $b, !$c"),
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[(set Preds:$p, (xor (setcc RC:$a, RC:$b, ocmp), (not Preds:$c)))]>;
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}
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multiclass PTX_LD<string opstr, string typestr, RegisterClass RC, PatFrag pat_load> {
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def rr32 : InstPTX<(outs RC:$d),
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(ins MEMri32:$a),
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@ -557,18 +625,50 @@ def FCOS64 : InstPTX<(outs RRegf64:$d),
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///===- Comparison and Selection Instructions -----------------------------===//
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defm SETPEQu32 : PTX_SETP<RRegu32, "u32", i32imm, SETEQ, "eq">;
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defm SETPNEu32 : PTX_SETP<RRegu32, "u32", i32imm, SETNE, "ne">;
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defm SETPLTu32 : PTX_SETP<RRegu32, "u32", i32imm, SETULT, "lt">;
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defm SETPLEu32 : PTX_SETP<RRegu32, "u32", i32imm, SETULE, "le">;
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defm SETPGTu32 : PTX_SETP<RRegu32, "u32", i32imm, SETUGT, "gt">;
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defm SETPGEu32 : PTX_SETP<RRegu32, "u32", i32imm, SETUGE, "ge">;
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defm SETPEQu64 : PTX_SETP<RRegu64, "u64", i64imm, SETEQ, "eq">;
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defm SETPNEu64 : PTX_SETP<RRegu64, "u64", i64imm, SETNE, "ne">;
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defm SETPLTu64 : PTX_SETP<RRegu64, "u64", i64imm, SETULT, "lt">;
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defm SETPLEu64 : PTX_SETP<RRegu64, "u64", i64imm, SETULE, "le">;
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defm SETPGTu64 : PTX_SETP<RRegu64, "u64", i64imm, SETUGT, "gt">;
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defm SETPGEu64 : PTX_SETP<RRegu64, "u64", i64imm, SETUGE, "ge">;
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// Compare u16
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defm SETPEQu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETEQ, "eq">;
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defm SETPNEu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETNE, "ne">;
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defm SETPLTu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETULT, "lt">;
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defm SETPLEu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETULE, "le">;
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defm SETPGTu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETUGT, "gt">;
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defm SETPGEu16 : PTX_SETP_I<RRegu16, "u16", i16imm, SETUGE, "ge">;
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// Compare u32
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defm SETPEQu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETEQ, "eq">;
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defm SETPNEu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETNE, "ne">;
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defm SETPLTu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETULT, "lt">;
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defm SETPLEu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETULE, "le">;
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defm SETPGTu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETUGT, "gt">;
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defm SETPGEu32 : PTX_SETP_I<RRegu32, "u32", i32imm, SETUGE, "ge">;
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// Compare u64
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defm SETPEQu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETEQ, "eq">;
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defm SETPNEu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETNE, "ne">;
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defm SETPLTu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETULT, "lt">;
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defm SETPLEu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETULE, "le">;
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defm SETPGTu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETUGT, "gt">;
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defm SETPGEu64 : PTX_SETP_I<RRegu64, "u64", i64imm, SETUGE, "ge">;
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// Compare f32
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defm SETPEQf32 : PTX_SETP_FP<RRegf32, "f32", SETUEQ, SETOEQ, "eq">;
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defm SETPNEf32 : PTX_SETP_FP<RRegf32, "f32", SETUNE, SETONE, "ne">;
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defm SETPLTf32 : PTX_SETP_FP<RRegf32, "f32", SETULT, SETOLT, "lt">;
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defm SETPLEf32 : PTX_SETP_FP<RRegf32, "f32", SETULE, SETOLE, "le">;
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defm SETPGTf32 : PTX_SETP_FP<RRegf32, "f32", SETUGT, SETOGT, "gt">;
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defm SETPGEf32 : PTX_SETP_FP<RRegf32, "f32", SETUGE, SETOGE, "ge">;
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// Compare f64
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defm SETPEQf64 : PTX_SETP_FP<RRegf64, "f64", SETUEQ, SETOEQ, "eq">;
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defm SETPNEf64 : PTX_SETP_FP<RRegf64, "f64", SETUNE, SETONE, "ne">;
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defm SETPLTf64 : PTX_SETP_FP<RRegf64, "f64", SETULT, SETOLT, "lt">;
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defm SETPLEf64 : PTX_SETP_FP<RRegf64, "f64", SETULE, SETOLE, "le">;
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defm SETPGTf64 : PTX_SETP_FP<RRegf64, "f64", SETUGT, SETOGT, "gt">;
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defm SETPGEf64 : PTX_SETP_FP<RRegf64, "f64", SETUGE, SETOGE, "ge">;
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///===- Logic and Shift Instructions --------------------------------------===//
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@ -654,18 +754,138 @@ defm STs : PTX_ST_ALL<"st.shared", store_shared>;
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// defm LDp : PTX_LD_ALL<"ld.param", load_parameter>;
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// TODO: Do something with st.param if/when it is needed.
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// Conversion to pred
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def CVT_pred_u16
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: InstPTX<(outs Preds:$d), (ins RRegu16:$a), "cvt.pred.u16\t$d, $a",
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[(set Preds:$d, (trunc RRegu16:$a))]>;
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def CVT_pred_u32
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: InstPTX<(outs Preds:$d), (ins RRegu32:$a), "cvt.pred.u32\t$d, $a",
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[(set Preds:$d, (trunc RRegu32:$a))]>;
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def CVT_pred_u64
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: InstPTX<(outs Preds:$d), (ins RRegu64:$a), "cvt.pred.u64\t$d, $a",
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[(set Preds:$d, (trunc RRegu64:$a))]>;
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def CVT_pred_f32
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: InstPTX<(outs Preds:$d), (ins RRegf32:$a), "cvt.pred.f32\t$d, $a",
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[(set Preds:$d, (fp_to_uint RRegf32:$a))]>;
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def CVT_pred_f64
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: InstPTX<(outs Preds:$d), (ins RRegf64:$a), "cvt.pred.f64\t$d, $a",
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[(set Preds:$d, (fp_to_uint RRegf64:$a))]>;
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// Conversion to u16
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def CVT_u16_pred
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: InstPTX<(outs RRegu16:$d), (ins Preds:$a), "cvt.u16.pred\t$d, $a",
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[(set RRegu16:$d, (zext Preds:$a))]>;
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def CVT_u16_u32
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: InstPTX<(outs RRegu16:$d), (ins RRegu32:$a), "cvt.u16.u32\t$d, $a",
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[(set RRegu16:$d, (trunc RRegu32:$a))]>;
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def CVT_u16_u64
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: InstPTX<(outs RRegu16:$d), (ins RRegu64:$a), "cvt.u16.u64\t$d, $a",
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[(set RRegu16:$d, (trunc RRegu64:$a))]>;
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def CVT_u16_f32
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: InstPTX<(outs RRegu16:$d), (ins RRegf32:$a), "cvt.u16.f32\t$d, $a",
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[(set RRegu16:$d, (fp_to_uint RRegf32:$a))]>;
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def CVT_u16_f64
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: InstPTX<(outs RRegu16:$d), (ins RRegf64:$a), "cvt.u16.f64\t$d, $a",
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[(set RRegu16:$d, (fp_to_uint RRegf64:$a))]>;
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// Conversion to u32
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def CVT_u32_pred
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: InstPTX<(outs RRegu32:$d), (ins Preds:$a), "cvt.u32.pred\t$d, $a",
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[(set RRegu32:$d, (zext Preds:$a))]>;
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def CVT_u32_u16
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: InstPTX<(outs RRegu32:$d), (ins RRegu16:$a), "cvt.u32.u16\t$d, $a",
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[(set RRegu32:$d, (zext RRegu16:$a))]>;
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def CVT_u32_u64
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: InstPTX<(outs RRegu32:$d), (ins RRegu64:$a), "cvt.u32.u64\t$d, $a",
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[(set RRegu32:$d, (trunc RRegu64:$a))]>;
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def CVT_u32_f32
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: InstPTX<(outs RRegu32:$d), (ins RRegf32:$a), "cvt.u32.f32\t$d, $a",
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[(set RRegu32:$d, (fp_to_uint RRegf32:$a))]>;
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def CVT_u32_f64
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: InstPTX<(outs RRegu32:$d), (ins RRegf64:$a), "cvt.u32.f64\t$d, $a",
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[(set RRegu32:$d, (fp_to_uint RRegf64:$a))]>;
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// Conversion to u64
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def CVT_u64_pred
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: InstPTX<(outs RRegu64:$d), (ins Preds:$a), "cvt.u64.pred\t$d, $a",
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[(set RRegu64:$d, (zext Preds:$a))]>;
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def CVT_u64_u16
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: InstPTX<(outs RRegu64:$d), (ins RRegu16:$a), "cvt.u64.u16\t$d, $a",
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[(set RRegu64:$d, (zext RRegu16:$a))]>;
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def CVT_u64_u32
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: InstPTX<(outs RRegu64:$d), (ins RRegu32:$a), "cvt.u64.u32\t$d, $a",
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[(set RRegu64:$d, (zext RRegu32:$a))]>;
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def CVT_u64_f32
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: InstPTX<(outs RRegu64:$d), (ins RRegf32:$a), "cvt.u64.f32\t$d, $a",
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[(set RRegu64:$d, (fp_to_uint RRegf32:$a))]>;
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def CVT_u64_f64
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: InstPTX<(outs RRegu64:$d), (ins RRegf64:$a), "cvt.u64.f32\t$d, $a",
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[(set RRegu64:$d, (fp_to_uint RRegf64:$a))]>;
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// Conversion to f32
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def CVT_f32_pred
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: InstPTX<(outs RRegf32:$d), (ins Preds:$a), "cvt.f32.pred\t$d, $a",
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[(set RRegf32:$d, (uint_to_fp Preds:$a))]>;
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def CVT_f32_u16
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: InstPTX<(outs RRegf32:$d), (ins RRegu16:$a), "cvt.f32.u16\t$d, $a",
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[(set RRegf32:$d, (uint_to_fp RRegu16:$a))]>;
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def CVT_f32_u32
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: InstPTX<(outs RRegf32:$d), (ins RRegu32:$a), "cvt.f32.u32\t$d, $a",
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[(set RRegf32:$d, (uint_to_fp RRegu32:$a))]>;
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def CVT_f32_u64
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: InstPTX<(outs RRegf32:$d), (ins RRegu64:$a), "cvt.f32.u64\t$d, $a",
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[(set RRegf32:$d, (uint_to_fp RRegu64:$a))]>;
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def CVT_f32_f64
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: InstPTX<(outs RRegf32:$d), (ins RRegf64:$a), "cvt.f32.f64\t$d, $a",
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[(set RRegf32:$d, (fround RRegf64:$a))]>;
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// Conversion to f64
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def CVT_f64_pred
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: InstPTX<(outs RRegf64:$d), (ins Preds:$a), "cvt.f64.pred\t$d, $a",
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[(set RRegf64:$d, (uint_to_fp Preds:$a))]>;
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def CVT_f64_u16
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: InstPTX<(outs RRegf64:$d), (ins RRegu16:$a), "cvt.f64.u16\t$d, $a",
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[(set RRegf64:$d, (uint_to_fp RRegu16:$a))]>;
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def CVT_f64_u32
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: InstPTX<(outs RRegf64:$d), (ins RRegu32:$a), "cvt.f64.u32\t$d, $a",
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[(set RRegf64:$d, (uint_to_fp RRegu32:$a))]>;
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def CVT_f64_u64
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: InstPTX<(outs RRegf64:$d), (ins RRegu64:$a), "cvt.f64.u64\t$d, $a",
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[(set RRegf64:$d, (uint_to_fp RRegu64:$a))]>;
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def CVT_f64_f32
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: InstPTX<(outs RRegf64:$d), (ins RRegf32:$a), "cvt.f64.f32\t$d, $a",
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[(set RRegf64:$d, (fextend RRegf32:$a))]>;
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///===- Control Flow Instructions -----------------------------------------===//
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let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
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