From 1e93b242461fcb01249d5f925e90f3eb3c2344ad Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Mon, 25 Jul 2011 20:00:32 +0000
Subject: [PATCH] Tidy up a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135945 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMInstrInfo.td | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index ec6052dfd75..77bb7439dfc 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -419,15 +419,8 @@ def shift_imm : Operand<i32> {
   let ParserMatchClass = ShifterAsmOperand;
 }
 
-def ShiftedRegAsmOperand : AsmOperandClass {
-  let Name = "ShiftedReg";
-}
-
-def ShiftedImmAsmOperand : AsmOperandClass {
-  let Name = "ShiftedImm";
-}
-
 // shifter_operand operands: so_reg_reg, so_reg_imm, and so_imm.
+def ShiftedRegAsmOperand : AsmOperandClass { let Name = "ShiftedReg"; }
 def so_reg_reg : Operand<i32>,  // reg reg imm
                  ComplexPattern<i32, 3, "SelectRegShifterOperand",
                                 [shl, srl, sra, rotr]> {
@@ -437,6 +430,7 @@ def so_reg_reg : Operand<i32>,  // reg reg imm
   let MIOperandInfo = (ops GPR, GPR, shift_imm);
 }
 
+def ShiftedImmAsmOperand : AsmOperandClass { let Name = "ShiftedImm"; }
 def so_reg_imm : Operand<i32>, // reg imm
                  ComplexPattern<i32, 2, "SelectImmShifterOperand",
                                 [shl, srl, sra, rotr]> {