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Added debugging routine dumpUses.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47042 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2008-02-13 02:45:38 +00:00
parent fd29e0eb06
commit 1eb5cf9c7d
2 changed files with 18 additions and 6 deletions
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16
include/llvm/CodeGen/MachineRegisterInfo.h
View File

@ -110,13 +110,22 @@ public:
RegNo -= TargetRegisterInfo::FirstVirtualRegister; RegNo -= TargetRegisterInfo::FirstVirtualRegister;
return VRegInfo[RegNo].second; return VRegInfo[RegNo].second;
} }
/// getVRegDef - Return the machine instr that defines the specified virtual
/// register or null if none is found. This assumes that the code is in SSA
/// form, so there should only be one definition.
MachineInstr *getVRegDef(unsigned Reg) const;
#ifndef NDEBUG
void dumpUses(unsigned RegNo) const;
#endif
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Virtual Register Info // Virtual Register Info
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
/// getRegClass - Return the register class of the specified virtual register. /// getRegClass - Return the register class of the specified virtual register.
const TargetRegisterClass *getRegClass(unsigned Reg) { const TargetRegisterClass *getRegClass(unsigned Reg) const {
Reg -= TargetRegisterInfo::FirstVirtualRegister; Reg -= TargetRegisterInfo::FirstVirtualRegister;
assert(Reg < VRegInfo.size() && "Invalid vreg!"); assert(Reg < VRegInfo.size() && "Invalid vreg!");
return VRegInfo[Reg].first; return VRegInfo[Reg].first;
@ -145,11 +154,6 @@ public:
return VRegInfo.size()+TargetRegisterInfo::FirstVirtualRegister-1; return VRegInfo.size()+TargetRegisterInfo::FirstVirtualRegister-1;
} }
/// getVRegDef - Return the machine instr that defines the specified virtual
/// register or null if none is found. This assumes that the code is in SSA
/// form, so there should only be one definition.
MachineInstr *getVRegDef(unsigned Reg) const;
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Physical Register Use Info // Physical Register Use Info

8
lib/CodeGen/MachineRegisterInfo.cpp
View File

@ -73,3 +73,11 @@ MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const {
} }
return 0; return 0;
} }
#ifndef NDEBUG
void MachineRegisterInfo::dumpUses(unsigned Reg) const {
for (use_iterator I = use_begin(Reg), E = use_end(); I != E; ++I)
I.getOperand().getParent()->dump();
}
#endif