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[mips] 80 columns.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171515 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-01-04 19:38:05 +00:00
parent 50c3042740
commit 1ebe5fce8e
4 changed files with 14 additions and 8 deletions
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5
lib/Target/Mips/Mips16InstrInfo.h
View File

@ -96,8 +96,9 @@ private:
unsigned Reg1, unsigned Reg2) const;
// Adjust SP by Amount bytes where bytes can be up to 32bit number.
void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
void adjustStackPtrBigUnrestricted(unsigned SP, int64_t Amount,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
};

3
lib/Target/Mips/Mips16RegisterInfo.h
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@ -22,7 +22,8 @@ class Mips16InstrInfo;
class Mips16RegisterInfo : public MipsRegisterInfo {
const Mips16InstrInfo &TII;
public:
Mips16RegisterInfo(const MipsSubtarget &Subtarget, const Mips16InstrInfo &TII);
Mips16RegisterInfo(const MipsSubtarget &Subtarget,
const Mips16InstrInfo &TII);
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,

12
lib/Target/Mips/Mips64InstrInfo.td
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@ -330,8 +330,12 @@ def : InstAlias<"mfc0 $rt, $rd", (MFC0_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"mtc0 $rt, $rd", (MTC0_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;
def : InstAlias<"mfc2 $rt, $rd", (MFC2_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"mtc2 $rt, $rd", (MTC2_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;
def : InstAlias<"dmfc0 $rt, $rd", (DMFC0_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"dmtc0 $rt, $rd", (DMTC0_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;
def : InstAlias<"dmfc2 $rt, $rd", (DMFC2_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"dmtc2 $rt, $rd", (DMTC2_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;
def : InstAlias<"dmfc0 $rt, $rd",
(DMFC0_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"dmtc0 $rt, $rd",
(DMTC0_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;
def : InstAlias<"dmfc2 $rt, $rd",
(DMFC2_3OP64 CPU64Regs:$rt, CPU64Regs:$rd, 0)>;
def : InstAlias<"dmtc2 $rt, $rd",
(DMTC2_3OP64 CPU64Regs:$rd, 0, CPU64Regs:$rt)>;

2
lib/Target/Mips/MipsInstrFormats.td
View File

@ -173,7 +173,7 @@ class FJ<bits<6> op>
let Inst{25-0} = target;
}
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// MFC instruction class in Mips : <|op|mf|rt|rd|0000000|sel|>
//===----------------------------------------------------------------------===//
class MFC3OP_FM<bits<6> op, bits<5> mfmt>