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Added a variety of PUSH and POP instructions, including
ones capable of accessing R/M operands instead of just registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81456 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -214,12 +214,18 @@ let Defs = [RBP,RSP], Uses = [RBP,RSP], mayLoad = 1, neverHasSideEffects = 1 in
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def LEAVE64 : I<0xC9, RawFrm,
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(outs), (ins), "leave", []>;
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let Defs = [RSP], Uses = [RSP], neverHasSideEffects=1 in {
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let mayLoad = 1 in
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let mayLoad = 1 in {
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def POP64r : I<0x58, AddRegFrm,
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(outs GR64:$reg), (ins), "pop{q}\t$reg", []>;
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let mayStore = 1 in
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def POP64rmr: I<0x8F, MRM0r, (outs GR64:$reg), (ins), "pop{q}\t$reg", []>;
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def POP64rmm: I<0x8F, MRM0m, (outs i64mem:$dst), (ins), "pop{q}\t$dst", []>;
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}
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let mayStore = 1 in {
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def PUSH64r : I<0x50, AddRegFrm,
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(outs), (ins GR64:$reg), "push{q}\t$reg", []>;
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def PUSH64rmr: I<0xFF, MRM6r, (outs), (ins GR64:$reg), "push{q}\t$reg", []>;
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def PUSH64rmm: I<0xFF, MRM6m, (outs), (ins i64mem:$src), "push{q}\t$src", []>;
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}
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}
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let Defs = [RSP], Uses = [RSP], neverHasSideEffects = 1, mayStore = 1 in {
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@ -706,11 +706,29 @@ def LEAVE : I<0xC9, RawFrm,
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(outs), (ins), "leave", []>;
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let Defs = [ESP], Uses = [ESP], neverHasSideEffects=1 in {
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let mayLoad = 1 in
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def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>;
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let mayLoad = 1 in {
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def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
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OpSize;
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def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>;
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def POP16rmr: I<0x8F, MRM0r, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
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OpSize;
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def POP16rmm: I<0x8F, MRM0m, (outs i16mem:$dst), (ins), "pop{w}\t$dst", []>,
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OpSize;
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def POP32rmr: I<0x8F, MRM0r, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>;
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def POP32rmm: I<0x8F, MRM0m, (outs i32mem:$dst), (ins), "pop{l}\t$dst", []>;
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}
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let mayStore = 1 in
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let mayStore = 1 in {
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def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
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OpSize;
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def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>;
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def PUSH16rmr: I<0xFF, MRM6r, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
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OpSize;
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def PUSH16rmm: I<0xFF, MRM6m, (outs), (ins i16mem:$src), "push{w}\t$src",[]>,
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OpSize;
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def PUSH32rmr: I<0xFF, MRM6r, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>;
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def PUSH32rmm: I<0xFF, MRM6m, (outs), (ins i32mem:$src), "push{l}\t$src",[]>;
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}
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}
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let Defs = [ESP], Uses = [ESP], neverHasSideEffects = 1, mayStore = 1 in {
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