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Use the correct format in the STW / SETPSC instruction names.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173494 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne
2013-01-25 21:25:12 +00:00
parent 0f1bcedf5a
commit 1f375e5bc7
3 changed files with 9 additions and 9 deletions
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lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
+1 -1
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@@ -401,7 +401,7 @@ DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
fieldFromInstruction(Insn, 27, 5) << 4;
switch (Opcode) {
case 0x0c:
Inst.setOpcode(XCore::STW_3r);
Inst.setOpcode(XCore::STW_l3r);
return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
case 0x1c:
Inst.setOpcode(XCore::XOR_l3r);