From 1fa7198f36b96462835acb2e1aad342021dac3a4 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 17 Oct 2008 18:15:05 +0000 Subject: [PATCH] add support for 128 bit inputs on both x86-64 and x86-32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57709 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0607797b713..fa467693bcf 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7509,15 +7509,13 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, case 'r': // GENERAL_REGS case 'R': // LEGACY_REGS case 'l': // INDEX_REGS - if (VT == MVT::i64 && Subtarget->is64Bit()) - return std::make_pair(0U, X86::GR64RegisterClass); - if (VT == MVT::i32 || VT == MVT::i64) - return std::make_pair(0U, X86::GR32RegisterClass); - else if (VT == MVT::i16) - return std::make_pair(0U, X86::GR16RegisterClass); - else if (VT == MVT::i8) + if (VT == MVT::i8) return std::make_pair(0U, X86::GR8RegisterClass); - break; + if (VT == MVT::i16) + return std::make_pair(0U, X86::GR16RegisterClass); + if (VT == MVT::i32 || !Subtarget->is64Bit()) + return std::make_pair(0U, X86::GR32RegisterClass); + return std::make_pair(0U, X86::GR64RegisterClass); case 'f': // FP Stack registers. // If SSE is enabled for this VT, use f80 to ensure the isel moves the // value to the correct fpstack register class. @@ -7529,7 +7527,6 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, case 'y': // MMX_REGS if MMX allowed. if (!Subtarget->hasMMX()) break; return std::make_pair(0U, X86::VR64RegisterClass); - break; case 'Y': // SSE_REGS if SSE2 allowed if (!Subtarget->hasSSE2()) break; // FALL THROUGH.