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WebAssembly: start instructions

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Summary:
* Add 64-bit address space feature.
* Rename SIMD feature to SIMD128.
* Handle single-thread model with an IR pass (same way ARM does).
* Rename generic processor to MVP, to follow design's lead.
* Add bleeding-edge processors, with all features included.
* Fix a few DEBUG_TYPE to match other backends.

Test Plan: ninja check

Reviewers: sunfish

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D10880

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241211 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
JF Bastien
2015-07-01 23:41:25 +00:00
parent a1a323c637
commit 1ff585db47
8 changed files with 31 additions and 13 deletions
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12
lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
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@ -24,6 +24,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Transforms/Scalar.h"
using namespace llvm;
#define DEBUG_TYPE "wasm"
@ -139,9 +140,14 @@ void WebAssemblyPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
//===----------------------------------------------------------------------===//
void WebAssemblyPassConfig::addIRPasses() {
// Expand some atomic operations. WebAssemblyTargetLowering has hooks which
// control specifically what gets lowered.
addPass(createAtomicExpandPass(&getTM<WebAssemblyTargetMachine>()));
// FIXME: the default for this option is currently POSIX, whereas
// WebAssembly's MVP should default to Single.
if (TM->Options.ThreadModel == ThreadModel::Single)
addPass(createLowerAtomicPass());
else
// Expand some atomic operations. WebAssemblyTargetLowering has hooks which
// control specifically what gets lowered.
addPass(createAtomicExpandPass(TM));
TargetPassConfig::addIRPasses();
}