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When checking that the necessary bits are zero in

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order to reduce ((x<<30)>>24) to x<<6, check the
correct bits.  PR 8547.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118665 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen
2010-11-10 01:30:56 +00:00
parent 8ea974039a
commit 201ab3acff
2 changed files with 28 additions and 2 deletions
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4
lib/Transforms/InstCombine/InstCombineShifts.cpp
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@@ -131,9 +131,9 @@ static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift,
// We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't
// profitable unless we know the and'd out bits are already zero.
if (CI->getZExtValue() > NumBits) {
unsigned HighBits = CI->getZExtValue() - NumBits;
unsigned LowBits = TypeWidth - CI->getZExtValue();
if (MaskedValueIsZero(I->getOperand(0),
APInt::getHighBitsSet(TypeWidth, HighBits)))
APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits))
return true;
}