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Make LoopStrengthReduce smarter about hoisting things out of
loops when they can be subsumed into addressing modes. Change X86 addressing mode check to realize that some PIC references need an extra register. (I believe this is correct for Linux, if not, I'm sure someone will tell me.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60608 91177308-0d34-0410-b5e6-96231b3b80d8
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30
test/CodeGen/X86/loop-strength-reduce-2.ll
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30
test/CodeGen/X86/loop-strength-reduce-2.ll
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@@ -0,0 +1,30 @@
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; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic | \
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; RUN: grep {A-} | count 1
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;
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; Make sure the common loop invariant A is hoisted up to preheader,
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; since too many registers are needed to subsume it into the addressing modes.
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@A = global [16 x [16 x i32]] zeroinitializer, align 32 ; <[16 x [16 x i32]]*> [#uses=2]
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define void @test(i32 %row, i32 %N.in) nounwind {
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entry:
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%N = bitcast i32 %N.in to i32 ; <i32> [#uses=1]
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%tmp5 = icmp sgt i32 %N.in, 0 ; <i1> [#uses=1]
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br i1 %tmp5, label %cond_true, label %return
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cond_true: ; preds = %cond_true, %entry
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%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
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%i.0.0 = bitcast i32 %indvar to i32 ; <i32> [#uses=2]
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%tmp2 = add i32 %i.0.0, 1 ; <i32> [#uses=1]
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%tmp = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp2 ; <i32*> [#uses=1]
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store i32 4, i32* %tmp
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%tmp5.upgrd.1 = add i32 %i.0.0, 2 ; <i32> [#uses=1]
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%tmp7 = getelementptr [16 x [16 x i32]]* @A, i32 0, i32 %row, i32 %tmp5.upgrd.1 ; <i32*> [#uses=1]
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store i32 5, i32* %tmp7
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %indvar.next, %N ; <i1> [#uses=1]
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br i1 %exitcond, label %return, label %cond_true
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return: ; preds = %cond_true, %entry
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ret void
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}
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