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Allow misaligned stores in x86 fast-isel.

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In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and
handled by the DAG-based ISel.  However, X86FastISel::X86SelectLoad() makes
no such requirement.  There doesn't appear to be an x86 architectural
correctness issue with allowing potentially unaligned store instructions.
This patch removes this restriction.

Patch by Jim Stichnot.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Derek Schuff 2013-04-18 17:41:08 +00:00
parent a3fb330d05
commit 2061dcf0e4
2 changed files with 18 additions and 5 deletions
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5
lib/Target/X86/X86FastISel.cpp
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@ -693,11 +693,6 @@ bool X86FastISel::X86SelectStore(const Instruction *I) {
if (S->isAtomic())
return false;
unsigned SABIAlignment =
TD.getABITypeAlignment(S->getValueOperand()->getType());
if (S->getAlignment() != 0 && S->getAlignment() < SABIAlignment)
return false;
MVT VT;
if (!isTypeLegal(I->getOperand(0)->getType(), VT, /*AllowI1=*/true))
return false;

18
test/CodeGen/X86/fast-isel-unaligned-store.ll Normal file
View File

@ -0,0 +1,18 @@
; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s
define i32 @test_store_32(i32* nocapture %addr, i32 %value) {
entry:
store i32 %value, i32* %addr, align 1
ret i32 %value
}
; CHECK: ret
define i16 @test_store_16(i16* nocapture %addr, i16 %value) {
entry:
store i16 %value, i16* %addr, align 1
ret i16 %value
}
; CHECK: ret