From 2067764e29dc2fd6d4d4b48940f41744eaff6d14 Mon Sep 17 00:00:00 2001 From: Reid Spencer Date: Fri, 20 Jul 2007 19:59:11 +0000 Subject: [PATCH] Fix validation errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40116 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/LangRef.html | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/docs/LangRef.html b/docs/LangRef.html index da7c7e1dea7..fa7fefafc47 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -200,11 +200,11 @@
  • 'llvm.memory.barrier' Intrinsic
    • -
  • General intrinsics
    • +
  • General intrinsics
      -
    1. 'llvm.var.annotation' - Intrinsic
      2. -
    +
  • + llvm.var.annotation' Intrinsic
    • + @@ -282,7 +282,7 @@ by the verifier pass indicate bugs in transformation passes or input to the parser.

    - +
    Identifiers
    @@ -4848,7 +4848,7 @@ Handling document.

    These do not form an API such as high-level threading libraries, software transaction memory systems, atomic primitives, and intrinsic - functionss as found in BSD, GNU libc, atomic_ops, APR, and other system and + functions as found in BSD, GNU libc, atomic_ops, APR, and other system and application libraries. The hardware interface provided by LLVM should allow a clean implementation of all of these APIs and parallel programming models. No one model or paradigm should be selected above others unless the hardware @@ -4864,14 +4864,13 @@ Handling document.

    Syntax:

    This is an overloaded intrinsic. You can use llvm.atomic.lcs on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.

     declare i8 @llvm.atomic.lcs.i8.i8p.i8.i8( i8* <ptr>, i8 <cmp>, i8 <val> )
 declare i16 @llvm.atomic.lcs.i16.i16p.i16.i16( i16* <ptr>, i16 <cmp>, i16 <val> )
 declare i32 @llvm.atomic.lcs.i32.i32p.i32.i32( i32* <ptr>, i32 <cmp>, i32 <val> )
 declare i64 @llvm.atomic.lcs.i64.i64p.i64.i64( i64* <ptr>, i64 <cmp>, i64 <val> )
    -

    Overview:

    This loads a value in shared memory and compares it to a given value. If they @@ -4920,14 +4919,13 @@ declare i64 @llvm.atomic.lcs.i64.i64p.i64.i64( i64* <ptr>, i64 <cmp>

    Syntax:

    This is an overloaded intrinsic. You can use llvm.atomic.ls on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.

     declare i8 @llvm.atomic.ls.i8.i8p.i8( i8* <ptr>, i8 <val> )
 declare i16 @llvm.atomic.ls.i16.i16p.i16( i16* <ptr>, i16 <val> )
 declare i32 @llvm.atomic.ls.i32.i32p.i32( i32* <ptr>, i32 <val> )
 declare i64 @llvm.atomic.ls.i64.i64p.i64( i64* <ptr>, i64 <val> )
    -

    Overview:

    This intrinsic loads the value stored in shared memory at ptr and @@ -4975,14 +4973,13 @@ declare i64 @llvm.atomic.ls.i64.i64p.i64( i64* <ptr>, i64 <val> )

    Syntax:

    This is an overloaded intrinsic. You can use llvm.atomic.las on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.

     declare i8 @llvm.atomic.las.i8.i8p.i8( i8* <ptr>, i8 <delta> )
 declare i16 @llvm.atomic.las.i16.i16p.i16( i16* <ptr>, i16 <delta> )
 declare i32 @llvm.atomic.las.i32.i32p.i32( i32* <ptr>, i32 <delta> )
 declare i64 @llvm.atomic.las.i64.i64p.i64( i64* <ptr>, i64 <delta> )
    -

    Overview:

    This intrinsic adds delta to the value stored in shared memory at @@ -5023,14 +5020,13 @@ declare i64 @llvm.atomic.las.i64.i64p.i64( i64* <ptr>, i64 <delta> )

    Syntax:

    This is an overloaded intrinsic. You can use llvm.atomic.lss on any - integer bit width. Not all targets support all bit widths however. + integer bit width. Not all targets support all bit widths however.

     declare i8 @llvm.atomic.lss.i8.i8.i8( i8* <ptr>, i8 <delta> )
 declare i16 @llvm.atomic.lss.i16.i16.i16( i16* <ptr>, i16 <delta> )
 declare i32 @llvm.atomic.lss.i32.i32.i32( i32* <ptr>, i32 <delta> )
 declare i64 @llvm.atomic.lss.i64.i64.i64( i64* <ptr>, i64 <delta> )
    -

    Overview:

    This intrinsic subtracts delta from the value stored in shared @@ -5070,11 +5066,9 @@ declare i64 @llvm.atomic.lss.i64.i64.i64( i64* <ptr>, i64 <delta> )

    Syntax:
    -

     declare void @llvm.memory.barrier( i1 <ll>, i1 <ls>, i1 <sl>, i1 <ss> )
    -

    Overview:

    The llvm.memory.barrier intrinsic guarantees ordering between