[X86] Require HasBMI2 for the new BZHI tablegen patterns.

Evidently tablegen doesn't infer this from the HasBMI2 predicate on the BZHI
instructions. This should fix the recent bot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206885 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Lang Hames 2014-04-22 12:04:53 +00:00
parent c13297fa76
commit 20850bba80

View File

@ -2113,26 +2113,28 @@ def BZHIMask : ImmLeaf<i64, [{
return isMask_64(Imm) && (CountTrailingOnes_64(Imm) > 32);
}]>;
def : Pat<(and GR64:$src, BZHIMask:$mask),
(BZHI64rr GR64:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
(MOV8ri (CountTrailingOnes imm:$mask)), sub_8bit))>;
let Predicates = [HasBMI2] in {
def : Pat<(and GR64:$src, BZHIMask:$mask),
(BZHI64rr GR64:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)),
(MOV8ri (CountTrailingOnes imm:$mask)), sub_8bit))>;
def : Pat<(and GR32:$src, (add (shl 1, GR8:$lz), -1)),
(BZHI32rr GR32:$src,
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and GR32:$src, (add (shl 1, GR8:$lz), -1)),
(BZHI32rr GR32:$src,
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and (loadi32 addr:$src), (add (shl 1, GR8:$lz), -1)),
(BZHI32rm addr:$src,
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and (loadi32 addr:$src), (add (shl 1, GR8:$lz), -1)),
(BZHI32rm addr:$src,
(INSERT_SUBREG (i32 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and GR64:$src, (add (shl 1, GR8:$lz), -1)),
(BZHI64rr GR64:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and GR64:$src, (add (shl 1, GR8:$lz), -1)),
(BZHI64rr GR64:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and (loadi64 addr:$src), (add (shl 1, GR8:$lz), -1)),
(BZHI64rm addr:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
def : Pat<(and (loadi64 addr:$src), (add (shl 1, GR8:$lz), -1)),
(BZHI64rm addr:$src,
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GR8:$lz, sub_8bit))>;
} // HasBMI2
let Predicates = [HasBMI] in {
def : Pat<(X86bextr GR32:$src1, GR32:$src2),