mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
For VMOV (immediate), make some of the encoding bits (cmode and op) unspecified.
For VMOVv*i[16,32], op bit is don't care, and some cmode bits vary depending on the immediate values. Ref: Table A7-15 Modified immediate values for Advanced SIMD instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90173 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
deea564e53
commit
208d76cad9
@ -2582,20 +2582,20 @@ def VMOVv16i8 : N1ModImm<1, 0b000, 0b1110, 0, 1, 0, 1, (outs QPR:$dst),
|
||||
"vmov", "i8", "$dst, $SIMM", "",
|
||||
[(set QPR:$dst, (v16i8 vmovImm8:$SIMM))]>;
|
||||
|
||||
def VMOVv4i16 : N1ModImm<1, 0b000, 0b1000, 0, 0, 0, 1, (outs DPR:$dst),
|
||||
def VMOVv4i16 : N1ModImm<1, 0b000, {1,0,?,?}, 0, 0, {?}, 1, (outs DPR:$dst),
|
||||
(ins h16imm:$SIMM), IIC_VMOVImm,
|
||||
"vmov", "i16", "$dst, $SIMM", "",
|
||||
[(set DPR:$dst, (v4i16 vmovImm16:$SIMM))]>;
|
||||
def VMOVv8i16 : N1ModImm<1, 0b000, 0b1000, 0, 1, 0, 1, (outs QPR:$dst),
|
||||
def VMOVv8i16 : N1ModImm<1, 0b000, {1,0,?,?}, 0, 1, {?}, 1, (outs QPR:$dst),
|
||||
(ins h16imm:$SIMM), IIC_VMOVImm,
|
||||
"vmov", "i16", "$dst, $SIMM", "",
|
||||
[(set QPR:$dst, (v8i16 vmovImm16:$SIMM))]>;
|
||||
|
||||
def VMOVv2i32 : N1ModImm<1, 0b000, 0b0000, 0, 0, 0, 1, (outs DPR:$dst),
|
||||
def VMOVv2i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 0, {?}, 1, (outs DPR:$dst),
|
||||
(ins h32imm:$SIMM), IIC_VMOVImm,
|
||||
"vmov", "i32", "$dst, $SIMM", "",
|
||||
[(set DPR:$dst, (v2i32 vmovImm32:$SIMM))]>;
|
||||
def VMOVv4i32 : N1ModImm<1, 0b000, 0b0000, 0, 1, 0, 1, (outs QPR:$dst),
|
||||
def VMOVv4i32 : N1ModImm<1, 0b000, {?,?,?,?}, 0, 1, {?}, 1, (outs QPR:$dst),
|
||||
(ins h32imm:$SIMM), IIC_VMOVImm,
|
||||
"vmov", "i32", "$dst, $SIMM", "",
|
||||
[(set QPR:$dst, (v4i32 vmovImm32:$SIMM))]>;
|
||||
|
Loading…
Reference in New Issue
Block a user