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Don't decode vperm2i128 or vperm2f128 into a shuffle if bit 3 or 7 of the immediate is set.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154907 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-04-17 05:54:54 +00:00
parent e4576266f4
commit 2091df3d09
2 changed files with 4 additions and 0 deletions
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3
lib/Target/X86/Utils/X86ShuffleDecode.cpp
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@ -169,6 +169,9 @@ void DecodeUNPCKLMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) {
void DecodeVPERM2X128Mask(EVT VT, unsigned Imm, void DecodeVPERM2X128Mask(EVT VT, unsigned Imm,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
if (Imm & 0x88)
return; // Not a shuffle
unsigned HalfSize = VT.getVectorNumElements()/2; unsigned HalfSize = VT.getVectorNumElements()/2;
unsigned FstHalfBegin = (Imm & 0x3) * HalfSize; unsigned FstHalfBegin = (Imm & 0x3) * HalfSize;
unsigned SndHalfBegin = ((Imm >> 4) & 0x3) * HalfSize; unsigned SndHalfBegin = ((Imm >> 4) & 0x3) * HalfSize;

1
lib/Target/X86/X86ISelLowering.cpp
View File

@ -4430,6 +4430,7 @@ static bool getTargetShuffleMask(SDNode *N, EVT VT,
case X86ISD::VPERM2X128: case X86ISD::VPERM2X128:
ImmN = N->getOperand(N->getNumOperands()-1); ImmN = N->getOperand(N->getNumOperands()-1);
DecodeVPERM2X128Mask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask); DecodeVPERM2X128Mask(VT, cast<ConstantSDNode>(ImmN)->getZExtValue(), Mask);
if (Mask.empty()) return false;
break; break;
case X86ISD::MOVDDUP: case X86ISD::MOVDDUP:
case X86ISD::MOVLHPD: case X86ISD::MOVLHPD: