Enable on-demand fast-isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107377 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-07-01 02:58:57 +00:00
parent abd1d859b3
commit 20d4be151b
4 changed files with 14 additions and 4 deletions

View File

@ -161,7 +161,10 @@ unsigned FastISel::materializeRegForValue(const Value *V, MVT VT) {
}
}
} else if (const Operator *Op = dyn_cast<Operator>(V)) {
if (!SelectOperator(Op, Op->getOpcode())) return 0;
if (!SelectOperator(Op, Op->getOpcode()))
if (!isa<Instruction>(Op) ||
!TargetSelectInstruction(cast<Instruction>(Op)))
return 0;
Reg = lookUpRegForValue(Op);
} else if (isa<UndefValue>(V)) {
Reg = createResultReg(TLI.getRegClassFor(VT));

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@ -709,6 +709,12 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
FastIS->startNewBlock(BB);
// Do FastISel on as many instructions as possible.
for (; BI != End; ++BI) {
// Defer instructions with no side effects; they'll be emitted
// on-demand later.
if (BI->isSafeToSpeculativelyExecute() &&
!FuncInfo->ValueMap.count(BI))
continue;
// Try to select the instruction with FastISel.
if (FastIS->SelectInstruction(BI))
continue;

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@ -935,7 +935,7 @@ bool X86FastISel::X86SelectBranch(const Instruction *I) {
if (CI->getIntrinsicID() == Intrinsic::sadd_with_overflow ||
CI->getIntrinsicID() == Intrinsic::uadd_with_overflow) {
const MachineInstr *SetMI = 0;
unsigned Reg = lookUpRegForValue(EI);
unsigned Reg = getRegForValue(EI);
for (MachineBasicBlock::const_reverse_iterator
RI = MBB->rbegin(), RE = MBB->rend(); RI != RE; ++RI) {

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@ -1,7 +1,8 @@
; RUN: llc < %s -march=x86 -O0 | grep {sarl \$80, %eax}
; PR3242
define i32 @foo(i32 %x) nounwind {
define void @foo(i32 %x, i32* %p) nounwind {
%y = ashr i32 %x, 50000
ret i32 %y
store i32 %y, i32* %p
ret void
}