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Merging rr220959:
------------------------------------------------------------------------ r220959 | uweigand | 2014-10-31 10:33:14 +0000 (Fri, 31 Oct 2014) | 13 lines [PowerPC] Load BlockAddress values from the TOC in 64-bit SVR4 code Since block address values can be larger than 2GB in 64-bit code, they cannot be loaded simply using an @l / @ha pair, but instead must be loaded from the TOC, just like GlobalAddress, ConstantPool, and JumpTable values are. The commit also fixes a bug in PPCLinuxAsmPrinter::doFinalization where temporary labels could not be used as TOC values, since code would attempt (and fail) to use GetOrCreateSymbol to create a symbol of the same name as the temporary label. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223741 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
e2349b0e6b
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21195134f5
lib/Target/PowerPC
test/CodeGen/PowerPC
@ -373,7 +373,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MO = MI->getOperand(1);
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// Map symbol -> label of TOC entry
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assert(MO.isGlobal() || MO.isCPI() || MO.isJTI());
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assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
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MCSymbol *MOSymbol = nullptr;
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if (MO.isGlobal())
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MOSymbol = getSymbol(MO.getGlobal());
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@ -381,6 +381,8 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MOSymbol = GetCPISymbol(MO.getIndex());
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else if (MO.isJTI())
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MOSymbol = GetJTISymbol(MO.getIndex());
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else if (MO.isBlockAddress())
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MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
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MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
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@ -397,6 +399,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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}
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case PPC::LDtocJTI:
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case PPC::LDtocCPT:
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case PPC::LDtocBA:
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case PPC::LDtoc: {
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// Transform %X3 = LDtoc <ga:@min1>, %X2
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LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin());
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@ -407,7 +410,7 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MO = MI->getOperand(1);
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// Map symbol -> label of TOC entry
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assert(MO.isGlobal() || MO.isCPI() || MO.isJTI());
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assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
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MCSymbol *MOSymbol = nullptr;
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if (MO.isGlobal())
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MOSymbol = getSymbol(MO.getGlobal());
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@ -415,6 +418,8 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MOSymbol = GetCPISymbol(MO.getIndex());
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else if (MO.isJTI())
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MOSymbol = GetJTISymbol(MO.getIndex());
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else if (MO.isBlockAddress())
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MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
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MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
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@ -436,7 +441,8 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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// reference the symbol directly.
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TmpInst.setOpcode(PPC::ADDIS8);
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const MachineOperand &MO = MI->getOperand(2);
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assert((MO.isGlobal() || MO.isCPI() || MO.isJTI()) &&
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assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
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MO.isBlockAddress()) &&
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"Invalid operand for ADDIStocHA!");
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MCSymbol *MOSymbol = nullptr;
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bool IsExternal = false;
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@ -456,9 +462,12 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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MOSymbol = GetCPISymbol(MO.getIndex());
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else if (MO.isJTI())
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MOSymbol = GetJTISymbol(MO.getIndex());
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else if (MO.isBlockAddress())
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MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
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if (IsExternal || IsNonLocalFunction || IsCommon || IsAvailExt ||
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MO.isJTI() || TM.getCodeModel() == CodeModel::Large)
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MO.isJTI() || MO.isBlockAddress() ||
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TM.getCodeModel() == CodeModel::Large)
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MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
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const MCExpr *Exp =
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@ -477,12 +486,17 @@ void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
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// associated TOC entry. Otherwise reference the symbol directly.
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TmpInst.setOpcode(PPC::LD);
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const MachineOperand &MO = MI->getOperand(1);
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assert((MO.isGlobal() || MO.isJTI() || MO.isCPI()) &&
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assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
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MO.isBlockAddress()) &&
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"Invalid operand for LDtocL!");
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MCSymbol *MOSymbol = nullptr;
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if (MO.isJTI())
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MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex()));
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else if (MO.isBlockAddress()) {
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MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
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MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
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}
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else if (MO.isCPI()) {
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MOSymbol = GetCPISymbol(MO.getIndex());
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if (TM.getCodeModel() == CodeModel::Large)
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@ -966,7 +980,7 @@ bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
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for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
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E = TOC.end(); I != E; ++I) {
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OutStreamer.EmitLabel(I->second);
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MCSymbol *S = OutContext.GetOrCreateSymbol(I->first->getName());
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MCSymbol *S = I->first;
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if (isPPC64)
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TS.emitTCEntry(*S);
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else
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@ -1439,7 +1439,7 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
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// For medium and large code model, we generate two instructions as
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// described below. Otherwise we allow SelectCodeCommon to handle this,
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// selecting one of LDtoc, LDtocJTI, and LDtocCPT.
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// selecting one of LDtoc, LDtocJTI, LDtocCPT, and LDtocBA.
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CodeModel::Model CModel = TM.getCodeModel();
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if (CModel != CodeModel::Medium && CModel != CodeModel::Large)
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break;
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@ -1456,7 +1456,8 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
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SDNode *Tmp = CurDAG->getMachineNode(PPC::ADDIStocHA, dl, MVT::i64,
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TOCbase, GA);
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if (isa<JumpTableSDNode>(GA) || CModel == CodeModel::Large)
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if (isa<JumpTableSDNode>(GA) || isa<BlockAddressSDNode>(GA) ||
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CModel == CodeModel::Large)
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return CurDAG->getMachineNode(PPC::LDtocL, dl, MVT::i64, GA,
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SDValue(Tmp, 0));
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@ -1631,8 +1631,16 @@ SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
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SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
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SelectionDAG &DAG) const {
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EVT PtrVT = Op.getValueType();
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BlockAddressSDNode *BASDN = cast<BlockAddressSDNode>(Op);
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const BlockAddress *BA = BASDN->getBlockAddress();
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const BlockAddress *BA = cast<BlockAddressSDNode>(Op)->getBlockAddress();
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// 64-bit SVR4 ABI code is always position-independent.
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// The actual BlockAddress is stored in the TOC.
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if (Subtarget.isSVR4ABI() && Subtarget.isPPC64()) {
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SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());
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return DAG.getNode(PPCISD::TOC_ENTRY, SDLoc(BASDN), MVT::i64, GA,
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DAG.getRegister(PPC::X2, MVT::i64));
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}
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unsigned MOHiFlag, MOLoFlag;
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bool isPIC = GetLabelAccessInfo(DAG.getTarget(), MOHiFlag, MOLoFlag);
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@ -786,7 +786,7 @@ let canFoldAsLoad = 1, PPC970_Unit = 2 in {
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def LD : DSForm_1<58, 0, (outs g8rc:$rD), (ins memrix:$src),
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"ld $rD, $src", IIC_LdStLD,
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[(set i64:$rD, (aligned4load ixaddr:$src))]>, isPPC64;
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// The following three definitions are selected for small code model only.
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// The following four definitions are selected for small code model only.
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// Otherwise, we need to create two instructions to form a 32-bit offset,
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// so we have a custom matcher for TOC_ENTRY in PPCDAGToDAGIsel::Select().
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def LDtoc: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg),
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@ -801,6 +801,10 @@ def LDtocCPT: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg),
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"#LDtocCPT",
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[(set i64:$rD,
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(PPCtoc_entry tconstpool:$disp, i64:$reg))]>, isPPC64;
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def LDtocBA: Pseudo<(outs g8rc:$rD), (ins tocentry:$disp, g8rc:$reg),
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"#LDtocCPT",
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[(set i64:$rD,
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(PPCtoc_entry tblockaddress:$disp, i64:$reg))]>, isPPC64;
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let hasSideEffects = 1, isCodeGenOnly = 1, RST = 2, Defs = [X2] in
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def LDinto_toc: DSForm_1<58, 0, (outs), (ins memrix:$src),
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26
test/CodeGen/PowerPC/blockaddress.ll
Normal file
26
test/CodeGen/PowerPC/blockaddress.ll
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@ -0,0 +1,26 @@
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; RUN: llc < %s -code-model=small -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL
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; RUN: llc < %s -code-model=medium -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
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; RUN: llc < %s -code-model=large -march=ppc64 -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
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; RUN: llc < %s -code-model=small -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=SMALL
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; RUN: llc < %s -code-model=medium -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
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; RUN: llc < %s -code-model=large -march=ppc64 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s -check-prefix=MEDIUM
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define i8* @test() {
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entry:
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br label %here
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here: ; preds = %entry
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; MEDIUM: .Ltmp[[TMP0:[0-9]+]]:
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; MEDIUM: addis [[R0:[0-9]+]], 2, .LC[[LC0:[0-9]+]]@toc@ha
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; MEDIUM: ld 3, .LC[[LC0]]@toc@l([[R0]])
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; MEDIUM: blr
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; MEDIUM: .LC[[LC0]]:
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; MEDIUM: .tc .Ltmp[[TMP0]][TC],.Ltmp[[TMP0]]
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; SMALL: .Ltmp[[TMP0:[0-9]+]]:
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; SMALL: ld 3, .LC[[LC0:[0-9]+]]@toc(2)
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; SMALL: blr
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; SMALL: .LC[[LC0]]:
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; SMALL: .tc .Ltmp[[TMP0]][TC],.Ltmp[[TMP0]]
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ret i8* blockaddress(@test, %here)
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}
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