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give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only
can access the stack due to how it is generated though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114522 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1169,7 +1169,6 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Parent, SDValue N, SDValue &Base,
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Parent->getOpcode() != ISD::PREFETCH &&
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Parent->getOpcode() != ISD::PREFETCH &&
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Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme
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Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme
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Parent->getOpcode() != ISD::INTRINSIC_VOID && // nontemporal stores.
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Parent->getOpcode() != ISD::INTRINSIC_VOID && // nontemporal stores.
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Parent->getOpcode() != X86ISD::FNSTCW16m &&
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Parent->getOpcode() != X86ISD::FLD &&
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Parent->getOpcode() != X86ISD::FLD &&
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Parent->getOpcode() != X86ISD::FILD &&
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Parent->getOpcode() != X86ISD::FILD &&
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Parent->getOpcode() != X86ISD::FILD_FLAG &&
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Parent->getOpcode() != X86ISD::FILD_FLAG &&
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@ -8158,41 +8158,48 @@ SDValue X86TargetLowering::LowerFLT_ROUNDS_(SDValue Op,
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const TargetFrameInfo &TFI = *TM.getFrameInfo();
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const TargetFrameInfo &TFI = *TM.getFrameInfo();
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unsigned StackAlignment = TFI.getStackAlignment();
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unsigned StackAlignment = TFI.getStackAlignment();
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EVT VT = Op.getValueType();
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EVT VT = Op.getValueType();
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DebugLoc dl = Op.getDebugLoc();
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DebugLoc DL = Op.getDebugLoc();
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// Save FP Control Word to stack slot
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// Save FP Control Word to stack slot
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int SSFI = MF.getFrameInfo()->CreateStackObject(2, StackAlignment, false);
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int SSFI = MF.getFrameInfo()->CreateStackObject(2, StackAlignment, false);
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SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
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SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
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SDValue Chain = DAG.getNode(X86ISD::FNSTCW16m, dl, MVT::Other,
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DAG.getEntryNode(), StackSlot);
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MachineMemOperand *MMO =
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MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(SSFI),
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MachineMemOperand::MOStore, 2, 2);
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SDValue Ops[] = { DAG.getEntryNode(), StackSlot };
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SDValue Chain = DAG.getMemIntrinsicNode(X86ISD::FNSTCW16m, DL,
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DAG.getVTList(MVT::Other),
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Ops, 2, MVT::i16, MMO);
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// Load FP Control Word from stack slot
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// Load FP Control Word from stack slot
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SDValue CWD = DAG.getLoad(MVT::i16, dl, Chain, StackSlot,
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SDValue CWD = DAG.getLoad(MVT::i16, DL, Chain, StackSlot,
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MachinePointerInfo(), false, false, 0);
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MachinePointerInfo(), false, false, 0);
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// Transform as necessary
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// Transform as necessary
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SDValue CWD1 =
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SDValue CWD1 =
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DAG.getNode(ISD::SRL, dl, MVT::i16,
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DAG.getNode(ISD::SRL, DL, MVT::i16,
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DAG.getNode(ISD::AND, dl, MVT::i16,
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DAG.getNode(ISD::AND, DL, MVT::i16,
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CWD, DAG.getConstant(0x800, MVT::i16)),
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CWD, DAG.getConstant(0x800, MVT::i16)),
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DAG.getConstant(11, MVT::i8));
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DAG.getConstant(11, MVT::i8));
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SDValue CWD2 =
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SDValue CWD2 =
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DAG.getNode(ISD::SRL, dl, MVT::i16,
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DAG.getNode(ISD::SRL, DL, MVT::i16,
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DAG.getNode(ISD::AND, dl, MVT::i16,
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DAG.getNode(ISD::AND, DL, MVT::i16,
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CWD, DAG.getConstant(0x400, MVT::i16)),
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CWD, DAG.getConstant(0x400, MVT::i16)),
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DAG.getConstant(9, MVT::i8));
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DAG.getConstant(9, MVT::i8));
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SDValue RetVal =
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SDValue RetVal =
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DAG.getNode(ISD::AND, dl, MVT::i16,
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DAG.getNode(ISD::AND, DL, MVT::i16,
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DAG.getNode(ISD::ADD, dl, MVT::i16,
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DAG.getNode(ISD::ADD, DL, MVT::i16,
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DAG.getNode(ISD::OR, dl, MVT::i16, CWD1, CWD2),
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DAG.getNode(ISD::OR, DL, MVT::i16, CWD1, CWD2),
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DAG.getConstant(1, MVT::i16)),
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DAG.getConstant(1, MVT::i16)),
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DAG.getConstant(3, MVT::i16));
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DAG.getConstant(3, MVT::i16));
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return DAG.getNode((VT.getSizeInBits() < 16 ?
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return DAG.getNode((VT.getSizeInBits() < 16 ?
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ISD::TRUNCATE : ISD::ZERO_EXTEND), dl, VT, RetVal);
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ISD::TRUNCATE : ISD::ZERO_EXTEND), DL, VT, RetVal);
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}
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}
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SDValue X86TargetLowering::LowerCTLZ(SDValue Op, SelectionDAG &DAG) const {
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SDValue X86TargetLowering::LowerCTLZ(SDValue Op, SelectionDAG &DAG) const {
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@ -205,9 +205,6 @@ namespace llvm {
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/// operand #3 optional in flag
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/// operand #3 optional in flag
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TC_RETURN,
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TC_RETURN,
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// FNSTCW16m - Store FP control world into i16 memory.
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FNSTCW16m,
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// VZEXT_MOVL - Vector move low and zero extend.
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// VZEXT_MOVL - Vector move low and zero extend.
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VZEXT_MOVL,
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VZEXT_MOVL,
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@ -302,6 +299,8 @@ namespace llvm {
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// VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
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// VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
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VZEXT_LOAD,
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VZEXT_LOAD,
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// FNSTCW16m - Store FP control world into i16 memory.
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FNSTCW16m,
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/// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
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/// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
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/// integer destination in memory and a FP reg source. This corresponds
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/// integer destination in memory and a FP reg source. This corresponds
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