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Refix CodeGen/Generic/switch-lower.ll. In contrast to my previous patch,
this doesn't miscompile lots of programs :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34268 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1205,8 +1205,8 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
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if ((TLI.isOperationLegal(ISD::BR_JT, MVT::Other) ||
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TLI.isOperationLegal(ISD::BRIND, MVT::Other)) &&
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Cases.size() > 5) {
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uint64_t First =cast<ConstantInt>(Cases.front().first)->getZExtValue();
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uint64_t Last = cast<ConstantInt>(Cases.back().first)->getZExtValue();
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uint64_t First =cast<ConstantInt>(Cases.front().first)->getSExtValue();
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uint64_t Last = cast<ConstantInt>(Cases.back().first)->getSExtValue();
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double Density = (double)Cases.size() / (double)((Last - First) + 1ULL);
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if (Density >= 0.3125) {
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@ -1255,7 +1255,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
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std::vector<MachineBasicBlock*> DestBBs;
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uint64_t TEI = First;
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for (CaseItr ii = Cases.begin(), ee = Cases.end(); ii != ee; ++TEI)
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if (cast<ConstantInt>(ii->first)->getZExtValue() == TEI) {
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if (cast<ConstantInt>(ii->first)->getSExtValue() == TEI) {
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DestBBs.push_back(ii->second);
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++ii;
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} else {
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@ -1363,8 +1363,8 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) {
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// Create a CaseBlock record representing a conditional branch to
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// the LHS node if the value being switched on SV is less than C.
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// Otherwise, branch to LHS.
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ISD::CondCode CC = ISD::SETLT;
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SelectionDAGISel::CaseBlock CB(CC, SV, C, TrueBB, FalseBB, CR.CaseBB);
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SelectionDAGISel::CaseBlock CB(ISD::SETLT, SV, C, TrueBB, FalseBB,
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CR.CaseBB);
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if (CR.CaseBB == CurMBB)
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visitSwitchCase(CB);
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