From 218c98c2848ef55607c729feb2c3d6d40ca504ae Mon Sep 17 00:00:00 2001 From: Kalle Raiskila Date: Thu, 7 Oct 2010 16:32:42 +0000 Subject: [PATCH] Add the missing cases to the type->registerclass conversion function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115921 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/CellSPU/SPUISelDAGToDAG.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp index d389842b785..38a13d1874c 100644 --- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp +++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp @@ -581,13 +581,27 @@ CurDAG->getMachineNode(COPY_TO_REGCLASS,..., ) function call */ SDValue SPUDAGToDAGISel::getRC( MVT VT ) { switch( VT.SimpleTy ) { + case MVT::i8: + return CurDAG->getTargetConstant(SPU::R8CRegClass.getID(), MVT::i32); + break; + case MVT::i16: + return CurDAG->getTargetConstant(SPU::R16CRegClass.getID(), MVT::i32); + break; case MVT::i32: return CurDAG->getTargetConstant(SPU::R32CRegClass.getID(), MVT::i32); break; + case MVT::f32: + return CurDAG->getTargetConstant(SPU::R32FPRegClass.getID(), MVT::i32); + break; case MVT::i64: return CurDAG->getTargetConstant(SPU::R64CRegClass.getID(), MVT::i32); break; + case MVT::v16i8: + case MVT::v8i16: + case MVT::v4i32: + case MVT::v4f32: case MVT::v2i64: + case MVT::v2f64: return CurDAG->getTargetConstant(SPU::VECREGRegClass.getID(), MVT::i32); break; default: