6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-05 13:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Revert a bit of r137667; the logic in question can safely handle atomic load/store.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137702 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-08-16 01:28:22 +00:00
parent 89a01a0cbd
commit 2199dfb0e6
2 changed files with 25 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Transforms/IPO/FunctionAttrs.cpp
View File

@ -163,15 +163,15 @@ bool FunctionAttrs::AddReadAttrs(const CallGraphSCC &SCC) {
ReadsMemory = true;
continue;
} else if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
// Ignore non-volatile loads from local memory.
if (LI->isUnordered()) {
// Ignore non-volatile loads from local memory. (Atomic is okay here.)
if (!LI->isVolatile()) {
AliasAnalysis::Location Loc = AA->getLocation(LI);
if (AA->pointsToConstantMemory(Loc, /*OrLocal=*/true))
continue;
}
} else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
// Ignore non-volatile stores to local memory.
if (SI->isUnordered()) {
// Ignore non-volatile stores to local memory. (Atomic is okay here.)
if (!SI->isVolatile()) {
AliasAnalysis::Location Loc = AA->getLocation(SI);
if (AA->pointsToConstantMemory(Loc, /*OrLocal=*/true))
continue;

21
test/Transforms/FunctionAttrs/atomic.ll Normal file
View File

@ -0,0 +1,21 @@
; RUN: opt -basicaa -functionattrs -S < %s | FileCheck %s
; Atomic load/store to local doesn't affect whether a function is
; readnone/readonly.
define i32 @test1(i32 %x) uwtable ssp {
; CHECK: define i32 @test1(i32 %x) uwtable readnone ssp {
entry:
%x.addr = alloca i32, align 4
store atomic i32 %x, i32* %x.addr seq_cst, align 4
%r = load atomic i32* %x.addr seq_cst, align 4
ret i32 %r
}
; A function with an Acquire load is not readonly.
define i32 @test2(i32* %x) uwtable ssp {
; CHECK: define i32 @test2(i32 %x) uwtable ssp {
entry:
%r = load atomic i32* %x seq_cst, align 4
ret i32 %r
}