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Remove the MCRegAliasIterator tables and compute the aliases dynamically.

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The size reduction in the RegDiffLists are rather dramatic.  Here are a few
size differences for MCTargetDesc.o files (before and after) in bytes:
R600 - 36160B - 11184B - 69% reduction
ARM - 28480B - 8368B - 71% reduction
Mips - 816B - 576B - 29% reduction

One side effect of dynamically computing the aliases is that the iterator does
not guarantee that the entries are ordered or that duplicates have been removed.
The documentation implies this is a safe assumption and I found no clients that
requires these attributes (i.e., strict ordering and uniqueness).

My local LNT tester results showed no execution-time failures or significant
compile-time regressions (i.e., beyond what I would consider noise) for -O0g,
-O2 and -O3 runs on x86_64 and i386 configurations.
rdar://12906217


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182783 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
2013-05-28 18:08:48 +00:00
parent 520b6e3fa5
commit 2275cfd75b
4 changed files with 74 additions and 90 deletions
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49
utils/TableGen/CodeGenRegisters.cpp
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@@ -526,55 +526,6 @@ CodeGenRegister::addSubRegsPreOrder(SetVector<const CodeGenRegister*> &OSet,
OSet.insert(I->second);
}
// Compute overlapping registers.
//
// The standard set is all super-registers and all sub-registers, but the
// target description can add arbitrary overlapping registers via the 'Aliases'
// field. This complicates things, but we can compute overlapping sets using
// the following rules:
//
// 1. The relation overlap(A, B) is reflexive and symmetric but not transitive.
//
// 2. overlap(A, B) implies overlap(A, S) for all S in supers(B).
//
// Alternatively:
//
// overlap(A, B) iff there exists:
// A' in { A, subregs(A) } and B' in { B, subregs(B) } such that:
// A' = B' or A' in aliases(B') or B' in aliases(A').
//
// Here subregs(A) is the full flattened sub-register set returned by
// A.getSubRegs() while aliases(A) is simply the special 'Aliases' field in the
// description of register A.
//
// This also implies that registers with a common sub-register are considered
// overlapping. This can happen when forming register pairs:
//
// P0 = (R0, R1)
// P1 = (R1, R2)
// P2 = (R2, R3)
//
// In this case, we will infer an overlap between P0 and P1 because of the
// shared sub-register R1. There is no overlap between P0 and P2.
//
void CodeGenRegister::computeOverlaps(CodeGenRegister::Set &Overlaps,
const CodeGenRegBank &RegBank) const {
assert(!RegUnits.empty() && "Compute register units before overlaps.");
// Register units are assigned such that the overlapping registers are the
// super-registers of the root registers of the register units.
for (unsigned rui = 0, rue = RegUnits.size(); rui != rue; ++rui) {
const RegUnit &RU = RegBank.getRegUnit(RegUnits[rui]);
ArrayRef<const CodeGenRegister*> Roots = RU.getRoots();
for (unsigned ri = 0, re = Roots.size(); ri != re; ++ri) {
const CodeGenRegister *Root = Roots[ri];
Overlaps.insert(Root);
ArrayRef<const CodeGenRegister*> Supers = Root->getSuperRegs();
Overlaps.insert(Supers.begin(), Supers.end());
}
}
}
// Get the sum of this register's unit weights.
unsigned CodeGenRegister::getWeight(const CodeGenRegBank &RegBank) const {
unsigned Weight = 0;