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Add the emms intrinsic for MMX support.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2007-03-05 23:09:45 +00:00
parent 53201869cd
commit 229baffc4e
3 changed files with 24 additions and 1 deletions
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9
include/llvm/IntrinsicsX86.td
View File

@ -535,3 +535,12 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Intrinsic<[llvm_void_ty, llvm_i32_ty,
llvm_i32_ty], [IntrWriteMem]>;
}
//===----------------------------------------------------------------------===//
// MMX
// Empty MMX state op.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">,
Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
}

5
lib/Target/X86/X86InstrMMX.td
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@ -33,6 +33,10 @@ def IMPLICIT_DEF_VR64 : I<0, Pseudo, (ops VR64:$dst),
def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>;
def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>;
// EMMS
def EMMS : I<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>, TB,
Requires<[HasMMX]>;
// Move Instructions
def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src),
"movd {$src, $dst|$dst, $src}", []>, TB,
@ -94,4 +98,3 @@ def MOVNTQ : I<0xE7, MRMDestMem, (ops i64mem:$dst, VR64:$src),
def MASKMOVQ : I<0xF7, MRMDestMem, (ops VR64:$src, VR64:$mask),
"maskmovq {$mask, $src|$src, $mask}", []>, TB,
Requires<[HasMMX]>;

11
test/CodeGen/X86/mmx-emms.ll Normal file
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@ -0,0 +1,11 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms
define void @foo() {
entry:
call void @llvm.x86.mmx.emms( )
br label %return
return: ; preds = %entry
ret void
}
declare void @llvm.x86.mmx.emms()