ARM mode 'mul' operand ordering tweak.

Same as r145922, just for ARM mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145923 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2011-12-06 05:28:00 +00:00
parent cf9814ddd2
commit 23261af193
2 changed files with 1 additions and 2 deletions

View File

@ -5067,4 +5067,4 @@ def : ARMInstAlias<"ror${s}${p} $Rn, $Rm",
// 'mul' instruction can be specified with only two operands.
def : ARMInstAlias<"mul${s}${p} $Rn, $Rm",
(MUL rGPR:$Rn, rGPR:$Rn, rGPR:$Rm, pred:$p, cc_out:$s)>;
(MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p, cc_out:$s)>;

View File

@ -1013,7 +1013,6 @@ Lforward:
@ CHECK: muls r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xe0]
@ CHECK: mulgt r5, r6, r7 @ encoding: [0x96,0x07,0x05,0xc0]
@ CHECK: mulsle r5, r6, r7 @ encoding: [0x96,0x07,0x15,0xd0]
@ CHECK: mul r11, r11, r5 @ encoding: [0x9b,0x05,0x0b,0xe0]
@------------------------------------------------------------------------------