mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-07-25 13:24:46 +00:00
ARM64: fix a couple of signed/unsigned comparison warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205174 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -422,7 +422,7 @@ void ARM64FrameLowering::emitEpilogue(MachineFunction &MF,
|
|||||||
static_cast<const ARM64RegisterInfo *>(MF.getTarget().getRegisterInfo());
|
static_cast<const ARM64RegisterInfo *>(MF.getTarget().getRegisterInfo());
|
||||||
DebugLoc DL = MBBI->getDebugLoc();
|
DebugLoc DL = MBBI->getDebugLoc();
|
||||||
|
|
||||||
unsigned NumBytes = MFI->getStackSize();
|
int NumBytes = MFI->getStackSize();
|
||||||
unsigned NumRestores = 0;
|
unsigned NumRestores = 0;
|
||||||
// Move past the restores of the callee-saved registers.
|
// Move past the restores of the callee-saved registers.
|
||||||
MachineBasicBlock::iterator LastPopI = MBBI;
|
MachineBasicBlock::iterator LastPopI = MBBI;
|
||||||
|
@@ -1308,8 +1308,7 @@ static bool isBitfieldExtractOpFromShr(SDNode *N, unsigned &Opc, SDValue &Opd0,
|
|||||||
} else
|
} else
|
||||||
return false;
|
return false;
|
||||||
|
|
||||||
assert(Shl_imm >= 0 && Shl_imm < VT.getSizeInBits() &&
|
assert(Shl_imm < VT.getSizeInBits() && "bad amount in shift node!");
|
||||||
"bad amount in shift node!");
|
|
||||||
uint64_t Srl_imm = 0;
|
uint64_t Srl_imm = 0;
|
||||||
if (!isIntImmediate(N->getOperand(1), Srl_imm))
|
if (!isIntImmediate(N->getOperand(1), Srl_imm))
|
||||||
return false;
|
return false;
|
||||||
|
Reference in New Issue
Block a user