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DEBUG_VALUE is now variable sized, as it has a
target-dependent memory address representation in it. Restore X86 printing of DEBUG_VALUE; lowering is done in X86RegisterInfo using the normal algorithm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93565 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -479,7 +479,7 @@ def COPY_TO_REGCLASS : Instruction {
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}
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def DEBUG_VALUE : Instruction {
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let OutOperandList = (ops);
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let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta);
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let InOperandList = (ops variable_ops);
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let AsmString = "DEBUG_VALUE";
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let Namespace = "TargetInstrInfo";
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let isAsCheapAsAMove = 1;
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@ -25,6 +25,7 @@
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/Analysis/DebugInfo.h"
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using namespace llvm;
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@ -420,6 +421,29 @@ void X86AsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
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case TargetInstrInfo::GC_LABEL:
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printLabel(MI);
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return;
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case TargetInstrInfo::DEBUG_VALUE: {
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if (!VerboseAsm)
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return;
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O << '\t' << MAI->getCommentString() << "DEBUG_VALUE: ";
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unsigned NOps = MI->getNumOperands();
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// cast away const; DIetc do not take const operands for some reason
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DIVariable V((MDNode*)(MI->getOperand(NOps-1).getMetadata()));
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O << V.getName();
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O << " <- ";
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if (NOps==3) {
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// Variable is in register
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assert(MI->getOperand(0).getType()==MachineOperand::MO_Register);
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printOperand(MI, 0);
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} else {
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// Frame address. Currently handles ESP or ESP + offset only
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assert(MI->getOperand(0).getType()==MachineOperand::MO_Register);
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assert(MI->getOperand(3).getType()==MachineOperand::MO_Immediate);
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O << '['; printOperand(MI, 0); O << '+'; printOperand(MI, 3); O << ']';
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}
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O << "+";
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printOperand(MI, NOps-2);
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return;
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}
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case TargetInstrInfo::INLINEASM:
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printInlineAsm(MI);
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return;
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