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https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-20 00:20:11 +00:00
Use std::bitset for SubtargetFeatures
Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. Differential Revision: http://reviews.llvm.org/D7065 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229831 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -16,6 +16,7 @@
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/MC/SubtargetFeature.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Format.h"
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#include "llvm/TableGen/Error.h"
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@@ -62,7 +63,7 @@ class SubtargetEmitter {
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CodeGenSchedModels &SchedModels;
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std::string Target;
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void Enumeration(raw_ostream &OS, const char *ClassName, bool isBits);
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void Enumeration(raw_ostream &OS, const char *ClassName);
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unsigned FeatureKeyValues(raw_ostream &OS);
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unsigned CPUKeyValues(raw_ostream &OS);
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void FormItineraryStageString(const std::string &Names,
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@@ -112,8 +113,7 @@ public:
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// Enumeration - Emit the specified class as an enumeration.
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//
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void SubtargetEmitter::Enumeration(raw_ostream &OS,
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const char *ClassName,
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bool isBits) {
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const char *ClassName) {
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// Get all records of class and sort
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std::vector<Record*> DefList = Records.getAllDerivedDefinitions(ClassName);
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std::sort(DefList.begin(), DefList.end(), LessRecord());
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@@ -121,50 +121,30 @@ void SubtargetEmitter::Enumeration(raw_ostream &OS,
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unsigned N = DefList.size();
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if (N == 0)
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return;
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if (N > 64) {
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errs() << "Too many (> 64) subtarget features!\n";
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if (N > MAX_SUBTARGET_FEATURES) {
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errs() << "Too many subtarget features! Bump MAX_SUBTARGET_FEATURES.";
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exit(1);
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}
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OS << "namespace " << Target << " {\n";
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// For bit flag enumerations with more than 32 items, emit constants.
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// Emit an enum for everything else.
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if (isBits && N > 32) {
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// For each record
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for (unsigned i = 0; i < N; i++) {
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// Next record
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Record *Def = DefList[i];
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// Open enumeration
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OS << "enum {\n";
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// Get and emit name and expression (1 << i)
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OS << " const uint64_t " << Def->getName() << " = 1ULL << " << i << ";\n";
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}
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} else {
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// Open enumeration
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OS << "enum {\n";
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// For each record
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for (unsigned i = 0; i < N;) {
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// Next record
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Record *Def = DefList[i];
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// For each record
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for (unsigned i = 0; i < N;) {
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// Next record
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Record *Def = DefList[i];
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// Get and emit name
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OS << " " << Def->getName() << " = " << i;
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if (++i < N) OS << ",";
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// Get and emit name
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OS << " " << Def->getName();
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// If bit flags then emit expression (1 << i)
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if (isBits) OS << " = " << " 1ULL << " << i;
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// Depending on 'if more in the list' emit comma
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if (++i < N) OS << ",";
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OS << "\n";
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}
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// Close enumeration
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OS << "};\n";
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OS << "\n";
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}
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OS << "}\n";
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// Close enumeration and namespace
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OS << "};\n}\n";
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}
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//
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@@ -198,22 +178,24 @@ unsigned SubtargetEmitter::FeatureKeyValues(raw_ostream &OS) {
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if (CommandLineName.empty()) continue;
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// Emit as { "feature", "description", featureEnum, i1 | i2 | ... | in }
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// Emit as { "feature", "description", { featureEnum }, { i1 , i2 , ... , in } }
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OS << " { "
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<< "\"" << CommandLineName << "\", "
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<< "\"" << Desc << "\", "
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<< Target << "::" << Name << ", ";
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<< "{ " << Target << "::" << Name << " }, ";
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const std::vector<Record*> &ImpliesList =
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Feature->getValueAsListOfDefs("Implies");
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if (ImpliesList.empty()) {
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OS << "0ULL";
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OS << "{ }";
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} else {
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OS << "{ ";
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for (unsigned j = 0, M = ImpliesList.size(); j < M;) {
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OS << Target << "::" << ImpliesList[j]->getName();
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if (++j < M) OS << " | ";
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if (++j < M) OS << ", ";
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}
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OS << " }";
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}
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OS << " }";
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@@ -255,22 +237,24 @@ unsigned SubtargetEmitter::CPUKeyValues(raw_ostream &OS) {
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const std::vector<Record*> &FeatureList =
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Processor->getValueAsListOfDefs("Features");
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// Emit as { "cpu", "description", f1 | f2 | ... fn },
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// Emit as { "cpu", "description", { f1 , f2 , ... fn } },
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OS << " { "
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<< "\"" << Name << "\", "
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<< "\"Select the " << Name << " processor\", ";
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if (FeatureList.empty()) {
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OS << "0ULL";
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OS << "{ }";
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} else {
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OS << "{ ";
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for (unsigned j = 0, M = FeatureList.size(); j < M;) {
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OS << Target << "::" << FeatureList[j]->getName();
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if (++j < M) OS << " | ";
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if (++j < M) OS << ", ";
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}
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OS << " }";
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}
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// The "0" is for the "implies" section of this data structure.
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OS << ", 0ULL }";
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// The { } is for the "implies" section of this data structure.
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OS << ", { } }";
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// Depending on 'if more in the list' emit comma
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if (++i < N) OS << ",";
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@@ -1398,7 +1382,7 @@ void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS,
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}
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OS << " InitMCProcessorInfo(CPU, FS);\n"
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<< " uint64_t Bits = getFeatureBits();\n";
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<< " const FeatureBitset& Bits = getFeatureBits();\n";
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for (unsigned i = 0; i < Features.size(); i++) {
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// Next record
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@@ -1408,12 +1392,12 @@ void SubtargetEmitter::ParseFeaturesFunction(raw_ostream &OS,
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const std::string &Attribute = R->getValueAsString("Attribute");
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if (Value=="true" || Value=="false")
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OS << " if ((Bits & " << Target << "::"
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<< Instance << ") != 0) "
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OS << " if (Bits[" << Target << "::"
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<< Instance << "]) "
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<< Attribute << " = " << Value << ";\n";
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else
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OS << " if ((Bits & " << Target << "::"
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<< Instance << ") != 0 && "
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OS << " if (Bits[" << Target << "::"
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<< Instance << "] && "
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<< Attribute << " < " << Value << ") "
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<< Attribute << " = " << Value << ";\n";
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}
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@@ -1431,7 +1415,7 @@ void SubtargetEmitter::run(raw_ostream &OS) {
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OS << "#undef GET_SUBTARGETINFO_ENUM\n";
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OS << "namespace llvm {\n";
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Enumeration(OS, "SubtargetFeature", true);
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Enumeration(OS, "SubtargetFeature");
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OS << "} // End llvm namespace \n";
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OS << "#endif // GET_SUBTARGETINFO_ENUM\n\n";
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