1
0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-14 11:32:34 +00:00

don't use "ordinary" addressing mode 1 when mvn is appropriate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32482 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola 2006-12-12 14:03:29 +00:00
parent 78f97f3118
commit 2426775c81
2 changed files with 14 additions and 1 deletions
lib/Target/ARM
test/CodeGen/ARM

View File

@ -849,6 +849,8 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand Op,
case ISD::Constant: {
uint32_t val = cast<ConstantSDNode>(N)->getValue();
if(!isRotInt8Immediate(val)) {
if (isRotInt8Immediate(~val))
return false; //use MVN
Constant *C = ConstantInt::get(Type::UIntTy, val);
int alignment = 2;
SDOperand Addr = CurDAG->getTargetConstantPool(C, MVT::i32, alignment);

View File

@ -1,5 +1,5 @@
; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 5
; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep mvn | wc -l | grep 6
int %f1() {
entry:
@ -53,3 +53,14 @@ entry:
%tmp3not = xor int %tmp3, -1 ; <int> [#uses=1]
ret int %tmp3not
}
int %f9() {
entry:
%tmp4845 = add int 0, 0
br label %cond_true4848
cond_true4848: ; preds = %bb4835
%tmp4851 = sub int -3, 0 ; <int> [#uses=1]
%abc = add int %tmp4851, %tmp4845
ret int %abc
}