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ARM64: assert if we see i64 -> i64 extend in the DAG.

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Should be no change in behaviour, but it makes the intended
functionality a bit clearer and means we only have to reason about
real extend operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209409 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2014-05-22 07:41:37 +00:00
parent de9e4c88c8
commit 2447dcc2e8
1 changed files with 2 additions and 4 deletions
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6
lib/Target/ARM64/ARM64ISelDAGToDAG.cpp
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@ -369,8 +369,7 @@ getExtendTypeForNode(SDValue N, bool IsLoadStore = false) {
return ARM64_AM::SXTH;
else if (SrcVT == MVT::i32)
return ARM64_AM::SXTW;
else if (SrcVT == MVT::i64)
return ARM64_AM::SXTX;
assert(SrcVT != MVT::i64 && "extend from 64-bits?");
return ARM64_AM::InvalidShiftExtend;
} else if (N.getOpcode() == ISD::ZERO_EXTEND ||
@ -382,8 +381,7 @@ getExtendTypeForNode(SDValue N, bool IsLoadStore = false) {
return ARM64_AM::UXTH;
else if (SrcVT == MVT::i32)
return ARM64_AM::UXTW;
else if (SrcVT == MVT::i64)
return ARM64_AM::UXTX;
assert(SrcVT != MVT::i64 && "extend from 64-bits?");
return ARM64_AM::InvalidShiftExtend;
} else if (N.getOpcode() == ISD::AND) {