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Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140233 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -19,8 +19,10 @@ using namespace llvm;
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extern "C" void LLVMInitializeMipsTarget() {
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// Register the target.
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RegisterTargetMachine<MipsTargetMachine> X(TheMipsTarget);
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RegisterTargetMachine<MipsebTargetMachine> X(TheMipsTarget);
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RegisterTargetMachine<MipselTargetMachine> Y(TheMipselTarget);
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RegisterTargetMachine<Mips64ebTargetMachine> A(TheMips64Target);
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RegisterTargetMachine<Mips64elTargetMachine> B(TheMips64elTarget);
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}
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// DataLayout --> Big-endian, 32-bit pointer/ABI/alignment
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@@ -34,23 +36,45 @@ MipsTargetMachine::
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MipsTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM,
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bool isLittle=false):
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bool isLittle):
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LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
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Subtarget(TT, CPU, FS, isLittle),
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DataLayout(isLittle ?
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std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
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std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
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DataLayout(isLittle ?
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(Subtarget.isABI_N64() ?
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"e-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-n32" :
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"e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
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(Subtarget.isABI_N64() ?
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"E-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-n32" :
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"E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
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InstrInfo(*this),
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FrameLowering(Subtarget),
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TLInfo(*this), TSInfo(*this), JITInfo() {
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}
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MipsebTargetMachine::
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MipsebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM) :
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MipsTargetMachine(T, TT, CPU, FS, RM, CM, false) {}
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MipselTargetMachine::
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MipselTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM) :
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MipsTargetMachine(T, TT, CPU, FS, RM, CM, true) {}
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Mips64ebTargetMachine::
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Mips64ebTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM) :
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MipsTargetMachine(T, TT, CPU, FS, RM, CM, false) {}
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Mips64elTargetMachine::
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Mips64elTargetMachine(const Target &T, StringRef TT,
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StringRef CPU, StringRef FS,
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Reloc::Model RM, CodeModel::Model CM) :
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MipsTargetMachine(T, TT, CPU, FS, RM, CM, true) {}
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// Install an instruction selector pass using
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// the ISelDag to gen Mips code.
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bool MipsTargetMachine::
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