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If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on

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them. The DAG combiner expects that nodes that are transformed have one value
result.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2008-12-10 22:36:00 +00:00
parent e5ad88e97f
commit 2476e5d345
2 changed files with 51 additions and 4 deletions
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15
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -966,6 +966,11 @@ SDValue DAGCombiner::visitADD(SDNode *N) {
SDValue FoldedVOp = SimplifyVBinOp(N);
if (FoldedVOp.getNode()) return FoldedVOp;
}
if (N->getNumValues() != 1)
// FIXME: DAG combiner cannot handle multiple return values on arithmetic
// operators.
return SDValue();
// fold (add x, undef) -> undef
if (N0.getOpcode() == ISD::UNDEF)
@@ -1161,6 +1166,11 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
SDValue FoldedVOp = SimplifyVBinOp(N);
if (FoldedVOp.getNode()) return FoldedVOp;
}
if (N->getNumValues() != 1)
// FIXME: DAG combiner cannot handle multiple return values on arithmetic
// operators.
return SDValue();
// fold (sub x, x) -> 0
if (N0 == N1)
@@ -1220,6 +1230,11 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
if (FoldedVOp.getNode()) return FoldedVOp;
}
if (N->getNumValues() != 1)
// FIXME: DAG combiner cannot handle multiple return values on arithmetic
// operators.
return SDValue();
// fold (mul x, undef) -> 0
if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF)
return DAG.getConstant(0, VT);