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Fix inverted preprocessor conditional.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76111 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Dunbar 2009-07-16 22:08:25 +00:00
parent efd280b4ca
commit 24cd3c4711
1 changed files with 1 additions and 1 deletions
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2
lib/CodeGen/VirtRegRewriter.cpp
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@ -491,7 +491,7 @@ static void ReMaterialize(MachineBasicBlock &MBB,
const TargetRegisterInfo *TRI,
VirtRegMap &VRM) {
MachineInstr *ReMatDefMI = VRM.getReMaterializedMI(Reg);
#ifdef NDEBUG
#ifndef NDEBUG
const TargetInstrDesc &TID = ReMatDefMI->getDesc();
assert(TID.getNumDefs() != 1 &&
"Don't know how to remat instructions that define > 1 values!");