From 24cee77dd4e28b7efd9db1ba8ae8a5fed40c16c7 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Fri, 3 Oct 2014 23:54:27 +0000
Subject: [PATCH] R600/SI: Fix ftrunc f64 conformance failures.

Re-add the tests since they were deleted at some point

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219036 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/AMDGPUISelLowering.cpp |   2 +-
 test/CodeGen/R600/fceil64.ll           |   2 +-
 test/CodeGen/R600/ffloor.ll            |   2 +-
 test/CodeGen/R600/frem.ll              |   2 +-
 test/CodeGen/R600/ftrunc.f64.ll        | 110 +++++++++++++++++++++++++
 5 files changed, 114 insertions(+), 4 deletions(-)
 create mode 100644 test/CodeGen/R600/ftrunc.f64.ll

diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index 32bab66aeed..9a5e39e8e30 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -1714,7 +1714,7 @@ SDValue AMDGPUTargetLowering::LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const {
   const unsigned ExpBits = 11;
 
   // Extract the exponent.
-  SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_I32, SL, MVT::i32,
+  SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32,
                                 Hi,
                                 DAG.getConstant(FractBits - 32, MVT::i32),
                                 DAG.getConstant(ExpBits, MVT::i32));
diff --git a/test/CodeGen/R600/fceil64.ll b/test/CodeGen/R600/fceil64.ll
index acdf8390db6..ec565a91bda 100644
--- a/test/CodeGen/R600/fceil64.ll
+++ b/test/CodeGen/R600/fceil64.ll
@@ -10,7 +10,7 @@ declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone
 
 ; FUNC-LABEL: {{^}}fceil_f64:
 ; CI: V_CEIL_F64_e32
-; SI: S_BFE_I32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
+; SI: S_BFE_U32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
 ; SI: S_ADD_I32 s{{[0-9]+}}, [[SEXP]], 0xfffffc01
 ; SI: S_LSHR_B64
 ; SI: S_NOT_B64
diff --git a/test/CodeGen/R600/ffloor.ll b/test/CodeGen/R600/ffloor.ll
index 7a4aeaa16e8..4436e820883 100644
--- a/test/CodeGen/R600/ffloor.ll
+++ b/test/CodeGen/R600/ffloor.ll
@@ -11,7 +11,7 @@ declare <16 x double> @llvm.floor.v16f64(<16 x double>) nounwind readnone
 ; FUNC-LABEL: {{^}}ffloor_f64:
 ; CI: V_FLOOR_F64_e32
 
-; SI: S_BFE_I32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
+; SI: S_BFE_U32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
 ; SI: S_ADD_I32 s{{[0-9]+}}, [[SEXP]], 0xfffffc01
 ; SI: S_LSHR_B64
 ; SI: S_NOT_B64
diff --git a/test/CodeGen/R600/frem.ll b/test/CodeGen/R600/frem.ll
index c005ff890cf..a520e0a83ea 100644
--- a/test/CodeGen/R600/frem.ll
+++ b/test/CodeGen/R600/frem.ll
@@ -57,7 +57,7 @@ define void @frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
 ; FUNC-LABEL: {{^}}unsafe_frem_f64:
 ; SI: V_RCP_F64_e32
 ; SI: V_MUL_F64
-; SI: V_BFE_I32
+; SI: V_BFE_U32
 ; SI: V_FMA_F64
 ; SI: S_ENDPGM
 define void @unsafe_frem_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
diff --git a/test/CodeGen/R600/ftrunc.f64.ll b/test/CodeGen/R600/ftrunc.f64.ll
new file mode 100644
index 00000000000..c4e589212ea
--- /dev/null
+++ b/test/CodeGen/R600/ftrunc.f64.ll
@@ -0,0 +1,110 @@
+; RUN: llc -march=r600 -mcpu=bonaire < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+
+declare double @llvm.trunc.f64(double) nounwind readnone
+declare <2 x double> @llvm.trunc.v2f64(<2 x double>) nounwind readnone
+declare <3 x double> @llvm.trunc.v3f64(<3 x double>) nounwind readnone
+declare <4 x double> @llvm.trunc.v4f64(<4 x double>) nounwind readnone
+declare <8 x double> @llvm.trunc.v8f64(<8 x double>) nounwind readnone
+declare <16 x double> @llvm.trunc.v16f64(<16 x double>) nounwind readnone
+
+; FUNC-LABEL: {{^}}v_ftrunc_f64:
+; CI: V_TRUNC_F64
+; SI: V_BFE_U32 {{v[0-9]+}}, {{v[0-9]+}}, 20, 11
+; SI: S_ENDPGM
+define void @v_ftrunc_f64(double addrspace(1)* %out, double addrspace(1)* %in) {
+  %x = load double addrspace(1)* %in, align 8
+  %y = call double @llvm.trunc.f64(double %x) nounwind readnone
+  store double %y, double addrspace(1)* %out, align 8
+  ret void
+}
+
+; FUNC-LABEL: {{^}}ftrunc_f64:
+; CI: V_TRUNC_F64_e32
+
+; SI: S_BFE_U32 [[SEXP:s[0-9]+]], {{s[0-9]+}}, 0xb0014
+; SI: S_ADD_I32 s{{[0-9]+}}, [[SEXP]], 0xfffffc01
+; SI: S_LSHR_B64
+; SI: S_NOT_B64
+; SI: S_AND_B64
+; SI: S_AND_B32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000
+; SI: CMP_LT_I32
+; SI: CNDMASK_B32
+; SI: CNDMASK_B32
+; SI: CMP_GT_I32
+; SI: CNDMASK_B32
+; SI: CNDMASK_B32
+; SI: S_ENDPGM
+define void @ftrunc_f64(double addrspace(1)* %out, double %x) {
+  %y = call double @llvm.trunc.f64(double %x) nounwind readnone
+  store double %y, double addrspace(1)* %out
+  ret void
+}
+
+; FUNC-LABEL: {{^}}ftrunc_v2f64:
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+define void @ftrunc_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %x) {
+  %y = call <2 x double> @llvm.trunc.v2f64(<2 x double> %x) nounwind readnone
+  store <2 x double> %y, <2 x double> addrspace(1)* %out
+  ret void
+}
+
+; FIXME-FUNC-LABEL: {{^}}ftrunc_v3f64:
+; FIXME-CI: V_TRUNC_F64_e32
+; FIXME-CI: V_TRUNC_F64_e32
+; FIXME-CI: V_TRUNC_F64_e32
+; define void @ftrunc_v3f64(<3 x double> addrspace(1)* %out, <3 x double> %x) {
+;   %y = call <3 x double> @llvm.trunc.v3f64(<3 x double> %x) nounwind readnone
+;   store <3 x double> %y, <3 x double> addrspace(1)* %out
+;   ret void
+; }
+
+; FUNC-LABEL: {{^}}ftrunc_v4f64:
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+define void @ftrunc_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %x) {
+  %y = call <4 x double> @llvm.trunc.v4f64(<4 x double> %x) nounwind readnone
+  store <4 x double> %y, <4 x double> addrspace(1)* %out
+  ret void
+}
+
+; FUNC-LABEL: {{^}}ftrunc_v8f64:
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+define void @ftrunc_v8f64(<8 x double> addrspace(1)* %out, <8 x double> %x) {
+  %y = call <8 x double> @llvm.trunc.v8f64(<8 x double> %x) nounwind readnone
+  store <8 x double> %y, <8 x double> addrspace(1)* %out
+  ret void
+}
+
+; FUNC-LABEL: {{^}}ftrunc_v16f64:
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+; CI: V_TRUNC_F64_e32
+define void @ftrunc_v16f64(<16 x double> addrspace(1)* %out, <16 x double> %x) {
+  %y = call <16 x double> @llvm.trunc.v16f64(<16 x double> %x) nounwind readnone
+  store <16 x double> %y, <16 x double> addrspace(1)* %out
+  ret void
+}