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1. Redo mips16 instructions to avoid multiple opcodes for same instruction.

Browse Source 
Change these to patterns.
2. Add another 16 instructions.

Patch by Reed Kotler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161272 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka
2012-08-03 22:57:02 +00:00
parent dcc4436cdd
commit 24e79e55da
21 changed files with 605 additions and 54 deletions
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17
test/CodeGen/Mips/or1.ll Normal file
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@ -0,0 +1,17 @@
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16
@x = global i32 65504, align 4
@y = global i32 60929, align 4
@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
define i32 @main() nounwind {
entry:
%0 = load i32* @x, align 4
%1 = load i32* @y, align 4
%or = or i32 %0, %1
; 16: or ${{[0-9]+}}, ${{[0-9]+}}
%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %or)
ret i32 0
}
declare i32 @printf(i8*, ...)