From 24f7fb3267e358bb589e1856d7c9cc43db5f91d5 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Mon, 29 Jan 2007 22:23:02 +0000
Subject: [PATCH] Comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33633 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMRegisterInfo.td | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Target/ARM/ARMRegisterInfo.td b/lib/Target/ARM/ARMRegisterInfo.td
index 0dfd790b56d..445fb26fc00 100644
--- a/lib/Target/ARM/ARMRegisterInfo.td
+++ b/lib/Target/ARM/ARMRegisterInfo.td
@@ -97,7 +97,7 @@ def GPR : RegisterClass<"ARM", [i32], 32, [R0, R1, R2, R3, R4, R5, R6,
   }];
   // FIXME: We are reserving r12 in case the PEI needs to use it to
   // generate large stack offset. Make it available once we have register
-  // scavenging.
+  // scavenging. Similarly r3 is reserved in Thumb mode for now.
   let MethodBodies = [{
     // FP is R11, R9 is available.
     static const unsigned ARM_GPR_AO_1[] = {