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MC: Update MCCodeEmitter naming. NFC.

Browse Source 
s/EncodeInstruction/encodeInstruction/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237469 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2015-05-15 19:13:16 +00:00
parent 8b22e9c00a
commit 251a66ec37
22 changed files with 33 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/MC/MCCodeEmitter.h
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@ -35,7 +35,7 @@ public:
/// EncodeInstruction - Encode the given \p Inst to bytes on the output /// EncodeInstruction - Encode the given \p Inst to bytes on the output
/// stream \p OS. /// stream \p OS.
virtual void EncodeInstruction(const MCInst &Inst, raw_ostream &OS, virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const = 0; const MCSubtargetInfo &STI) const = 0;
}; };

2
lib/MC/MCAsmStreamer.cpp
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@ -1167,7 +1167,7 @@ void MCAsmStreamer::AddEncodingComment(const MCInst &Inst,
SmallString<256> Code; SmallString<256> Code;
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
Emitter->EncodeInstruction(Inst, VecOS, Fixups, STI); Emitter->encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush(); VecOS.flush();
// If we are showing fixups, create symbolic markers in the encoded // If we are showing fixups, create symbolic markers in the encoded

2
lib/MC/MCAssembler.cpp
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@ -1020,7 +1020,7 @@ bool MCAssembler::relaxInstruction(MCAsmLayout &Layout,
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code; SmallString<256> Code;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
getEmitter().EncodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo()); getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo());
VecOS.flush(); VecOS.flush();
// Update the fragment. // Update the fragment.

2
lib/MC/MCELFStreamer.cpp
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@ -479,7 +479,7 @@ void MCELFStreamer::EmitInstToData(const MCInst &Inst,
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code; SmallString<256> Code;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
Assembler.getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI); Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush(); VecOS.flush();
for (unsigned i = 0, e = Fixups.size(); i != e; ++i) for (unsigned i = 0, e = Fixups.size(); i != e; ++i)

2
lib/MC/MCMachOStreamer.cpp
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@ -445,7 +445,7 @@ void MCMachOStreamer::EmitInstToData(const MCInst &Inst,
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code; SmallString<256> Code;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI); getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush(); VecOS.flush();
// Add the fixups and data. // Add the fixups and data.

2
lib/MC/MCObjectStreamer.cpp
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@ -256,7 +256,7 @@ void MCObjectStreamer::EmitInstToFragment(const MCInst &Inst,
SmallString<128> Code; SmallString<128> Code;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, IF->getFixups(), getAssembler().getEmitter().encodeInstruction(Inst, VecOS, IF->getFixups(),
STI); STI);
VecOS.flush(); VecOS.flush();
IF->getContents().append(Code.begin(), Code.end()); IF->getContents().append(Code.begin(), Code.end());

2
lib/MC/WinCOFFStreamer.cpp
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@ -49,7 +49,7 @@ void MCWinCOFFStreamer::EmitInstToData(const MCInst &Inst,
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code; SmallString<256> Code;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI); getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush(); VecOS.flush();
// Add the fixups and data. // Add the fixups and data.

4
lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
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@ -184,7 +184,7 @@ public:
} }
} }
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -598,7 +598,7 @@ unsigned AArch64MCCodeEmitter::fixMOVZ(const MCInst &MI, unsigned EncodedValue,
return EncodedValue & ~(1u << 30); return EncodedValue & ~(1u << 30);
} }
void AArch64MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
if (MI.getOpcode() == AArch64::TLSDESCCALL) { if (MI.getOpcode() == AArch64::TLSDESCCALL) {

4
lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
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@ -432,7 +432,7 @@ public:
} }
} }
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
}; };
@ -1666,7 +1666,7 @@ getShiftRight64Imm(const MCInst &MI, unsigned Op,
} }
void ARMMCCodeEmitter:: void ARMMCCodeEmitter::
EncodeInstruction(const MCInst &MI, raw_ostream &OS, encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
// Pseudo instructions don't get encoded. // Pseudo instructions don't get encoded.

4
lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
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@ -52,7 +52,7 @@ public:
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const; const MCSubtargetInfo &STI) const;
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
}; };
@ -117,7 +117,7 @@ void EmitBEConstant(uint64_t Val, unsigned Size, unsigned &CurByte,
EmitByte((Val >> i) & 255, CurByte, OS); EmitByte((Val >> i) & 255, CurByte, OS);
} }
void BPFMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode(); unsigned Opcode = MI.getOpcode();

2
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
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@ -55,7 +55,7 @@ HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII,
: MCT(aMCT), MCII(aMII), Addend(new unsigned(0)), : MCT(aMCT), MCII(aMII), Addend(new unsigned(0)),
Extended(new bool(false)) {} Extended(new bool(false)) {}
void HexagonMCCodeEmitter::EncodeInstruction(MCInst const &MI, raw_ostream &OS, void HexagonMCCodeEmitter::encodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const { MCSubtargetInfo const &STI) const {
uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI) | getPacketBits(MI); uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI) | getPacketBits(MI);

2
lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
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@ -41,7 +41,7 @@ public:
MCSubtargetInfo const &getSubtargetInfo() const; MCSubtargetInfo const &getSubtargetInfo() const;
void EncodeInstruction(MCInst const &MI, raw_ostream &OS, void encodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const override; MCSubtargetInfo const &STI) const override;

6
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
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@ -141,10 +141,10 @@ void MipsMCCodeEmitter::EmitInstruction(uint64_t Val, unsigned Size,
} }
} }
/// EncodeInstruction - Emit the instruction. /// encodeInstruction - Emit the instruction.
/// Size the instruction with Desc.getSize(). /// Size the instruction with Desc.getSize().
void MipsMCCodeEmitter:: void MipsMCCodeEmitter::
EncodeInstruction(const MCInst &MI, raw_ostream &OS, encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const const MCSubtargetInfo &STI) const
{ {
@ -177,7 +177,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
unsigned Opcode = TmpInst.getOpcode(); unsigned Opcode = TmpInst.getOpcode();
if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) &&
(Opcode != Mips::SLL_MM) && !Binary) (Opcode != Mips::SLL_MM) && !Binary)
llvm_unreachable("unimplemented opcode in EncodeInstruction()"); llvm_unreachable("unimplemented opcode in encodeInstruction()");
int NewOpcode = -1; int NewOpcode = -1;
if (isMicroMips(STI)) { if (isMicroMips(STI)) {

2
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
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@ -51,7 +51,7 @@ public:
void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
raw_ostream &OS) const; raw_ostream &OS) const;
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;

2
lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
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@ -97,7 +97,7 @@ public:
uint64_t getBinaryCodeForInstr(const MCInst &MI, uint64_t getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const; const MCSubtargetInfo &STI) const;
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override { const MCSubtargetInfo &STI) const override {
// For fast-isel, a float COPY_TO_REGCLASS can survive this long. // For fast-isel, a float COPY_TO_REGCLASS can survive this long.

2
lib/Target/R600/AMDGPUMCInstLower.cpp
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@ -134,7 +134,7 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
auto &ObjStreamer = static_cast<MCObjectStreamer&>(*OutStreamer); auto &ObjStreamer = static_cast<MCObjectStreamer&>(*OutStreamer);
MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter(); MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter();
InstEmitter.EncodeInstruction(TmpInst, CodeStream, Fixups, InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups,
MF->getSubtarget<MCSubtargetInfo>()); MF->getSubtarget<MCSubtargetInfo>());
CodeStream.flush(); CodeStream.flush();

4
lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
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@ -41,7 +41,7 @@ public:
: MCII(mcii), MRI(mri) { } : MCII(mcii), MRI(mri) { }
/// \brief Encode the instruction and write it to the OS. /// \brief Encode the instruction and write it to the OS.
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -86,7 +86,7 @@ MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII,
return new R600MCCodeEmitter(MCII, MRI); return new R600MCCodeEmitter(MCII, MRI);
} }
void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, void R600MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); const MCInstrDesc &Desc = MCII.get(MI.getOpcode());

4
lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
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@ -52,7 +52,7 @@ public:
~SIMCCodeEmitter() override {} ~SIMCCodeEmitter() override {}
/// \brief Encode the instruction and write it to the OS. /// \brief Encode the instruction and write it to the OS.
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -179,7 +179,7 @@ uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO,
return getLit64Encoding(static_cast<uint64_t>(MO.getImm())); return getLit64Encoding(static_cast<uint64_t>(MO.getImm()));
} }
void SIMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {

6
lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
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@ -41,7 +41,7 @@ public:
~SparcMCCodeEmitter() override {} ~SparcMCCodeEmitter() override {}
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -79,7 +79,7 @@ MCCodeEmitter *llvm::createSparcMCCodeEmitter(const MCInstrInfo &MCII,
return new SparcMCCodeEmitter(Ctx); return new SparcMCCodeEmitter(Ctx);
} }
void SparcMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI);
@ -154,7 +154,7 @@ getCallTargetOpValue(const MCInst &MI, unsigned OpNo,
if (MI.getOpcode() == SP::TLS_CALL) { if (MI.getOpcode() == SP::TLS_CALL) {
// No fixups for __tls_get_addr. Will emit for fixups for tls_symbol in // No fixups for __tls_get_addr. Will emit for fixups for tls_symbol in
// EncodeInstruction. // encodeInstruction.
#ifndef NDEBUG #ifndef NDEBUG
// Verify that the callee is actually __tls_get_addr. // Verify that the callee is actually __tls_get_addr.
const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(MO.getExpr()); const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(MO.getExpr());

4
lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
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@ -35,7 +35,7 @@ public:
~SystemZMCCodeEmitter() override {} ~SystemZMCCodeEmitter() override {}
// OVerride MCCodeEmitter. // OVerride MCCodeEmitter.
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -118,7 +118,7 @@ MCCodeEmitter *llvm::createSystemZMCCodeEmitter(const MCInstrInfo &MCII,
} }
void SystemZMCCodeEmitter:: void SystemZMCCodeEmitter::
EncodeInstruction(const MCInst &MI, raw_ostream &OS, encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI); uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);

4
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
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@ -149,7 +149,7 @@ public:
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const; const MCSubtargetInfo &STI) const;
void EncodeInstruction(const MCInst &MI, raw_ostream &OS, void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override; const MCSubtargetInfo &STI) const override;
@ -1152,7 +1152,7 @@ void X86MCCodeEmitter::EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
} }
void X86MCCodeEmitter:: void X86MCCodeEmitter::
EncodeInstruction(const MCInst &MI, raw_ostream &OS, encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const { const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode(); unsigned Opcode = MI.getOpcode();

2
lib/Target/X86/X86MCInstLower.cpp
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@ -87,7 +87,7 @@ namespace llvm {
SmallString<256> Code; SmallString<256> Code;
SmallVector<MCFixup, 4> Fixups; SmallVector<MCFixup, 4> Fixups;
raw_svector_ostream VecOS(Code); raw_svector_ostream VecOS(Code);
CodeEmitter->EncodeInstruction(Inst, VecOS, Fixups, STI); CodeEmitter->encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush(); VecOS.flush();
CurrentShadowSize += Code.size(); CurrentShadowSize += Code.size();
if (CurrentShadowSize >= RequiredShadowSize) if (CurrentShadowSize >= RequiredShadowSize)