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Added support to move "added instructions" after the delay slot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@967 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -565,40 +565,100 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added *after* this machine
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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// instruction, add them now
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if( AddedInstrMap[ MInst ] ) {
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if( AddedInstrMap[ MInst ] &&
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! (AddedInstrMap[ MInst ]->InstrnsAfter).empty() ) {
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deque<MachineInstr *> &IAft = (AddedInstrMap[MInst])->InstrnsAfter;
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// if there are delay slots for this instruction, the instructions
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// added after it must really go after the delayed instruction(s)
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if( ! IAft.empty() ) {
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// So, we move the InstrAfter of the current instruction to the
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// corresponding delayed instruction
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deque<MachineInstr *>::iterator AdIt;
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unsigned delay;
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++MInstIterator; // advance to the next instruction
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if((delay=TM.getInstrInfo().getNumDelaySlots(MInst->getOpCode())) >0){
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move2DelayedInstr(MInst, *(MInstIterator+delay) );
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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cerr << " *#* APPENDed instr opcode: " << *AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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if(DEBUG_RA) cout<< "\nMoved an added instr after the delay slot";
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}
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}
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else {
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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deque<MachineInstr *> &IAft = (AddedInstrMap[MInst])->InstrnsAfter;
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if( ! IAft.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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++MInstIterator; // advance to the next instruction
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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cerr << " *#* APPENDed instr opcode: " << *AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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}
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} // if not delay
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}
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}
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} // for each machine instruction
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} // for each machine instruction
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}
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}
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}
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}
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//----------------------------------------------------------------------------
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//
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// If there are delay slots for an instruction, the instructions
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// added after it must really go after the delayed instruction(s).
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// So, we move the InstrAfter of that instruction to the
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// corresponding delayed instruction using the following method.
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//----------------------------------------------------------------------------
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void PhyRegAlloc:: move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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// "added after" instructions of the original instr
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deque<MachineInstr *> &OrigAft = (AddedInstrMap[OrigMI])->InstrnsAfter;
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// "added instructions" of the delayed instr
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AddedInstrns *DelayAdI = AddedInstrMap[DelayedMI];
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if(! DelayAdI ) { // create a new "added after" if necessary
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DelayAdI = new AddedInstrns();
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AddedInstrMap[DelayedMI] = DelayAdI;
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}
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// "added after" instructions of the delayed instr
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deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
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// go thru all the "added after instructions" of the original instruction
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// and append them to the "addded after instructions" of the delayed
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// instructions
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deque<MachineInstr *>::iterator OrigAdIt;
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for( OrigAdIt = OrigAft.begin(); OrigAdIt != OrigAft.end() ; ++OrigAdIt ) {
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DelayedAft.push_back( *OrigAdIt );
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}
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// empty the "added after instructions" of the original instruction
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OrigAft.clear();
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}
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// This method prints the code with registers after register allocation is
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// This method prints the code with registers after register allocation is
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@ -565,40 +565,100 @@ void PhyRegAlloc::updateMachineCode()
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// If there are instructions to be added *after* this machine
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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// instruction, add them now
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if( AddedInstrMap[ MInst ] ) {
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if( AddedInstrMap[ MInst ] &&
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! (AddedInstrMap[ MInst ]->InstrnsAfter).empty() ) {
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deque<MachineInstr *> &IAft = (AddedInstrMap[MInst])->InstrnsAfter;
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// if there are delay slots for this instruction, the instructions
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// added after it must really go after the delayed instruction(s)
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if( ! IAft.empty() ) {
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// So, we move the InstrAfter of the current instruction to the
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// corresponding delayed instruction
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deque<MachineInstr *>::iterator AdIt;
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unsigned delay;
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++MInstIterator; // advance to the next instruction
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if((delay=TM.getInstrInfo().getNumDelaySlots(MInst->getOpCode())) >0){
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move2DelayedInstr(MInst, *(MInstIterator+delay) );
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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cerr << " *#* APPENDed instr opcode: " << *AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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if(DEBUG_RA) cout<< "\nMoved an added instr after the delay slot";
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}
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}
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else {
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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deque<MachineInstr *> &IAft = (AddedInstrMap[MInst])->InstrnsAfter;
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if( ! IAft.empty() ) {
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deque<MachineInstr *>::iterator AdIt;
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++MInstIterator; // advance to the next instruction
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA)
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cerr << " *#* APPENDed instr opcode: " << *AdIt << endl;
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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}
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} // if not delay
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}
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}
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} // for each machine instruction
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} // for each machine instruction
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}
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}
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}
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}
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//----------------------------------------------------------------------------
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//
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// If there are delay slots for an instruction, the instructions
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// added after it must really go after the delayed instruction(s).
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// So, we move the InstrAfter of that instruction to the
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// corresponding delayed instruction using the following method.
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//----------------------------------------------------------------------------
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void PhyRegAlloc:: move2DelayedInstr(const MachineInstr *OrigMI,
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const MachineInstr *DelayedMI) {
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// "added after" instructions of the original instr
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deque<MachineInstr *> &OrigAft = (AddedInstrMap[OrigMI])->InstrnsAfter;
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// "added instructions" of the delayed instr
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AddedInstrns *DelayAdI = AddedInstrMap[DelayedMI];
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if(! DelayAdI ) { // create a new "added after" if necessary
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DelayAdI = new AddedInstrns();
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AddedInstrMap[DelayedMI] = DelayAdI;
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}
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// "added after" instructions of the delayed instr
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deque<MachineInstr *> &DelayedAft = DelayAdI->InstrnsAfter;
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// go thru all the "added after instructions" of the original instruction
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// and append them to the "addded after instructions" of the delayed
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// instructions
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deque<MachineInstr *>::iterator OrigAdIt;
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for( OrigAdIt = OrigAft.begin(); OrigAdIt != OrigAft.end() ; ++OrigAdIt ) {
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DelayedAft.push_back( *OrigAdIt );
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}
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// empty the "added after instructions" of the original instruction
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OrigAft.clear();
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}
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// This method prints the code with registers after register allocation is
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// This method prints the code with registers after register allocation is
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