6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-14 00:32:55 +00:00
Code Issues Projects Releases Wiki Activity

fix some linking problems with the new gcc

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27460 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2006-04-06 21:26:32 +00:00
parent 4ff8892972
commit 253b9e7750
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/Alpha/AlphaISelLowering.cpp
View File

@ -571,7 +571,7 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
GlobalValue *GV = GSDN->getGlobal();
SDOperand GA = DAG.getTargetGlobalAddress(GV, MVT::i64, GSDN->getOffset());
if (!GV->hasWeakLinkage() && !GV->isExternal()) {
if (!GV->hasWeakLinkage() && !GV->isExternal() && !GV->hasLinkOnceLinkage()) {
SDOperand Hi = DAG.getNode(AlphaISD::GPRelHi, MVT::i64, GA,
DAG.getNode(AlphaISD::GlobalBaseReg, MVT::i64));
SDOperand Lo = DAG.getNode(AlphaISD::GPRelLo, MVT::i64, GA, Hi);
@ -602,6 +602,8 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
case ISD::SDIV:
case ISD::UDIV:
if (MVT::isInteger(Op.getValueType())) {
if (Op.getOperand(1).getOpcode() == ISD::Constant)
return Op.getOpcode() == ISD::SDIV ? BuildSDIVSequence(Op, &DAG) : BuildUDIVSequence(Op, &DAG);
const char* opstr = 0;
switch(Op.getOpcode()) {
case ISD::UREM: opstr = "__remqu"; break;