6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-08 18:30:04 +00:00
Code Issues Projects Releases Wiki Activity

implement mips16 tls global addr

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166827 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler 2012-10-26 22:57:32 +00:00
parent f29c05e883
commit 25424154f4
2 changed files with 21 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/Mips/Mips16InstrInfo.td
View File

@ -1437,5 +1437,13 @@ def: SetCC_R16<setult, SltuCCRxRy16>;
def: SetCC_I16<setult, immSExt16, SltiuCCRxImmX16>;
// wrapper_pic
class Wrapper16Pat<SDNode node, Instruction ADDiuOp, RegisterClass RC>:
Mips16Pat<(MipsWrapper RC:$gp, node:$in),
(ADDiuOp RC:$gp, node:$in)>;
def : Wrapper16Pat<tglobaltlsaddr, AddiuRxRxImmX16, CPU16Regs>;
def: Mips16Pat<(add CPU16Regs:$hi, (MipsLo tglobaladdr:$lo)),
(AddiuRxRxImmX16 CPU16Regs:$hi, tglobaladdr:$lo)>;

13
test/CodeGen/Mips/tls16.ll Normal file
View File

@ -0,0 +1,13 @@
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PIC16
@a = thread_local global i32 4, align 4
define i32 @foo() nounwind readonly {
entry:
%0 = load i32* @a, align 4
; PIC16: lw ${{[0-9]+}}, %call16(__tls_get_addr)(${{[0-9]+}})
; PIC16: addiu ${{[0-9]+}}, %tlsgd(a)
ret i32 %0
}