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Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -545,26 +545,6 @@ void RALinScan::linearScan()
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if (!isPhys && vrm_->getPreSplitReg(cur.reg))
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continue;
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// A register defined by an implicit_def can be liveout the def BB and livein
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// to a use BB. Add it to the livein set of the use BB's.
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if (!isPhys && cur.empty()) {
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if (MachineInstr *DefMI = mri_->getVRegDef(cur.reg)) {
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assert(DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF);
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MachineBasicBlock *DefMBB = DefMI->getParent();
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SmallPtrSet<MachineBasicBlock*, 4> Seen;
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Seen.insert(DefMBB);
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for (MachineRegisterInfo::reg_iterator ri = mri_->reg_begin(cur.reg),
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re = mri_->reg_end(); ri != re; ++ri) {
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MachineInstr *UseMI = &*ri;
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MachineBasicBlock *UseMBB = UseMI->getParent();
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if (Seen.insert(UseMBB)) {
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assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
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"Adding a virtual register to livein set?");
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UseMBB->addLiveIn(Reg);
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}
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}
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}
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}
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for (LiveInterval::Ranges::const_iterator I = cur.begin(), E = cur.end();
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I != E; ++I) {
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const LiveRange &LR = *I;
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@ -905,17 +885,6 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
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DOUT << tri_->getName(physReg) << '\n';
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// Note the register is not really in use.
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vrm_->assignVirt2Phys(cur->reg, physReg);
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// Since the register allocator is allowed to assign this virtual register
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// physical register that overlaps other live intervals. Mark these
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// operands as "Undef" which means later passes, e.g. register scavenger
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// can ignore them.
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for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(cur->reg),
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RE = mri_->reg_end(); RI != RE; ++RI) {
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MachineOperand &MO = RI.getOperand();
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MO.setIsUndef();
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if (MO.isKill())
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MO.setIsKill(false);
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}
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return;
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}
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