mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
When adding a register, we should mark it as "def" if it can optionally define
said (physical) register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
a11ce95cfc
commit
25b141912c
@ -253,7 +253,6 @@ unsigned InstrEmitter::getVR(SDValue Op,
|
||||
return I->second;
|
||||
}
|
||||
|
||||
|
||||
/// AddRegisterOperand - Add the specified register as an operand to the
|
||||
/// specified machine instr. Insert register copies if the register is
|
||||
/// not in the required register class.
|
||||
@ -337,7 +336,10 @@ void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op,
|
||||
const ConstantFP *CFP = F->getConstantFPValue();
|
||||
MI->addOperand(MachineOperand::CreateFPImm(CFP));
|
||||
} else if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Op)) {
|
||||
MI->addOperand(MachineOperand::CreateReg(R->getReg(), false));
|
||||
unsigned Reg = R->getReg();
|
||||
const TargetInstrDesc &TID = MI->getDesc();
|
||||
MI->addOperand(MachineOperand::CreateReg(Reg,
|
||||
(Reg == 0 || !TID.OpInfo) ? false : TID.OpInfo[IIOpNum].isOptionalDef()));
|
||||
} else if (GlobalAddressSDNode *TGA = dyn_cast<GlobalAddressSDNode>(Op)) {
|
||||
MI->addOperand(MachineOperand::CreateGA(TGA->getGlobal(), TGA->getOffset(),
|
||||
TGA->getTargetFlags()));
|
||||
|
Loading…
Reference in New Issue
Block a user