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[PowerPC] PR16512 - Support TLS call sequences in the asm parser

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This patch now adds support for recognizing TLS call sequences in
the asm parser.  This needs a new pattern BL8_TLS, which is like
BL8_NOP_TLS except without nop.  That pattern is used for the
asm parser only.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185478 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Ulrich Weigand
2013-07-02 21:31:59 +00:00
parent a17a7e1868
commit 25b9bbae69
3 changed files with 40 additions and 2 deletions
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14
test/MC/PowerPC/ppc64-fixups.s
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@@ -391,6 +391,20 @@ base:
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0
addi 3, 3, target@got@tlsld
# CHECK: bl __tls_get_addr(target@TLSGD) # encoding: [0b010010BB,B,B,0bBBBBBB01]
# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSGD, kind: fixup_ppc_nofixup
# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0
# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
bl __tls_get_addr(target@tlsgd)
# CHECK: bl __tls_get_addr(target@TLSLD) # encoding: [0b010010BB,B,B,0bBBBBBB01]
# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSLD, kind: fixup_ppc_nofixup
# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24
# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0
# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0
bl __tls_get_addr(target@tlsld)
# Data relocs
# llvm-mc does not show any "encoding" string for data, so we just check the relocs